FREE EMBEDDED SYSTEMS RESUME SAMPLES

Resume # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Resume 1

Samples represents that of an actual working technical professional found on the WEB and modified to protect the privacy of these professionals. Human names, company names, colleges, software product names are intentionally made up.

Rao Danis

154 Forest Dr.
Brattford, MA 01845

OBJECTIVE

To work in a position where my skills in embedded applications are utilized to the fullest extent.

SUMMARY

Versatile R&D professional with 10 years experience in conceptualization and development of microprocessor-based products and solutions. Specialized skills in high speed Data Acquisition, Process Control, DCS & SCADA applications. Diverse experience in solving Data Acquisition and Process control problems for a variety of industries.

COMPUTER SKILLS

Compilers / Editors IAR C compiler, Keil C debugger environment , Code Wright
Software Control packages Visual Source safe, Clear case
Programming Languages C & Assembly Languages, familiar with C++ concepts.
EDA packages Accel Tech & ORCAD: Schematic Capture & PCB layout.
Data Acquisition packages Keithley View DAC, Intelligent Instruments Visual Designer, DasyLab, LabDAS, National instruments LabView CV+, Genie.
Emulators / Simulators Signum 8051 emulator, MetaLink 8051 emulator, ComAp , Mitsubishi M16C/62, Nohau Kiel C simulator, IAR
Microprocessors / Microcontrollers
- Intel : 8085, 8086/88, 8xC51FA/FB/FC, 8xC251;
- Motorola :68K;
- Atmel : 89C51/52/55, 89C2051;
- Dallas Semiconductors: 87C520/530
- Mitsubishi: M16C/62, M32RD;
- Philips: 8xC51RA/RB/RC+/RD+, Hitachi H8/3048

EXPERIENCE

Reider Automation, Hanover, MA
Jan 2000 to Present
Sr. Firmware Engineer

Organize and maintain the C / Assembly language source code in a structured manner for the Kampai project in ClearCase – a version control package.
Effectively use tools such as Nohau emulator for Mitsubishi M16C/62 microcontroller to design, implement and debug firmware in C / Assembly languages, logic analyzers etc.
Develop Device Drivers for interface to the various peripheral hardware resources of the PLC, such as serial- E2PROM and RTC on the I2C bus. Developed code to support on-board analog input channels, schedule blocks and auto-detection of hardware resources configured by the user. Contributed to assembly code for power-up and power-down sequencing of the PLC under various conditions.
Create script files to automate compilation and linking of source files using IAR C-compiler on a regular basis.
Developed a comprehensive test lab for conducting regression tests for validation of features. Helped develop a complete environment for automation of regression tests using various in-house tools such as VB scripts.
Contributed to generation and maintenance of quality documentation such as Product Specifications, Technical Specifications, Code Developer s Guidelines, etc. for the Kampai line of low-end PLCs.

FITEMCO GROUP, NY
July 1999 to Dec 2000
R&D Engineer, International Products Division

Enhance features in a popular line of alarm systems to make them homologous for the European market. Create efficient code in assembly language on the Phillips 8051 RD+ microcontroller. Developed algorithms in firmware to test product features such as continuously monitoring battery drain for compliance with International Standards ANPI . Developed microcontroller interface to the RF receiver circuit using a Z86E08 processor to support jamming detection feature.

B-TEK CORP., Baton Rouge, LA
October 1998 to June 1999
R&D Engineer

Worked on improvements and modifications to the HART protocol interface for the AccuTrack series of smart level transmitters / indicators. Also worked on developing a low-cost smart alternative to the existing thermal dispersion type Flow and Level sensors. Exposed to designing for FM, UL & CENELEC approvals

TELECOMSOFT Pvt. Ltd., Pune, India.
March 1998 to Sept 1998
Senior Hardware Engineer

Designed & Developed an extremely low form factor, battery operated, IEEE 7816/III compliant Smart Card Interface using the Hitachi H8/3048F microcontroller for Mantha Software Inc.
Incorporated HART protocol compliant features in to the AccuTrack series of smart Level transmitter / indicator, based on the Intel / Philips 83C51FA microcontroller for K-Tek corp., La. Designed the electronics for a thermal dispersion flow and level sensor.

REUOLE ELECTRONICS Pvt. Ltd. Bombay, India
April 1996 to Feb 1998
Applications Engineer, Intelligent Instrumentation products Div.

Understand user requirements, offer solutions, generate quotes, participate in technical negotiations, and submit techno-commercial bids for Defense and Government contracts.
Configured Data Acquisition Solutions using Intelligent Instrumentation s products. Generated application programs and HMI screens for customers using Visual Designer.
Executed projects in the defense and automotive industry high speed DAS for an engine test application .

SOFT TECHNOLOGIES, Ltd.
Jan 1992 to March 1996
Project Coordinator Jan 1995 to March 1996

PC-Based Data Acquisition System: Developed Automated Test Equipment for testing the reliability of engine transmission gear and axles , using a Kiethley-Metrabyte DAS card.

Involved in design of strain gauge signal conditioning amplifiers and signal conditioning for RTD sensors.
Developed the user interface MMI , the application software for high speed data acquisition using ViewDAC, efficient algorithms to sort and display data prior to occurrence of error conditions, and utilities for data analysis.

Distributed Control System: Developed and commissioned a DCS for a fermentation process plant using microprocessor based proprietary modular hardware.

Developed a real-time operating system, a menu driven user interface for the DCS on a LCD screen, and implemented the PID algorithms for temperature control using PWM.

Checkweigher: Involved in the development of the signal conditioning for LVDT loadcell, the A/D converter, the microprocessor interface and in canceling effects of noise due to motor vibration.

Developed the complete software for this project including data acquisition, dynamic calibration algorithms, implementation of user tunable digital filters and algorithms to store and extract statistical information.

Senior R & D Engineer Jan 1993 to Dec 1994

FormFill & Seal FFS Controller:

Designed the Microprocessor Control Module, and defined a proprietary bus structure for Analog & Digital signals, which formed the basis for several new products.
Introduced modular / structured programming methodologies in assembly language,
Project Coordinator for production phase. Responsible for carrying out subsequent upgrades. Developed and implemented artificial intelligence algorithms.

PLC for Perfume manufacturer:

Developed a programmable controller to sequentially switch solenoid valves per user-entered recipes for a perfume blending application. System successfully commissioned in record time at site for S. H. Kelkar & Co., who are one of the three largest perfume manufacturers in Asia.
Designed the RS-232 interface to PC and defined the handshake protocol for communicating to PC software, devised and implemented user tunable digital filters in assembly software.

Junior Engineer R & D Jan 1992 to Dec 1992

Weather Monitoring Data logger: Design of Data logging system customized for logging weather parameters.

Part of the team, which designed – the signal conditioning for weather sensors, the A/D converter and microprocessor modules.
Added software features that allowed the calibration of the system at site.

T-TRONICS TEST EQUIPMENT
Oct 1990 to Dec 1991

Level 1 and 2, customer support engineer for Integrated Circuit testing equipment and universal device programmers. Helped marketing team in organizing presentations and customer training.

EDUCATION

Bachelor of Engineering Electronics [equivalent to a BSEE in US], University of Pune, India 1990

Resume 2

Kumar Verkar

Objective:

Seeking challenging position as senior Software Engineer/ Design Engineer in the field of design/development where there is a lot of scope to develop my knowledge, potential and skill.

REFERENCES Available upon request

Educational Details :

Masters in Technology M.Tech. in Computer Science from Computer Science Dept.–University of Pune India .
Bachelor in Engineering B.E. in Electrical Engineering from Govt. Engineering College-Bilaspur India .

Technical Proficiency :

Technology/Protocol : DWDM, CWDM, SONET OC-192, OC-48 based product , k-56 Modem v.90
OS : VxWorks, WINDOWS NT, WINDOWS CE, DOS, UNIX, LINUX
Languages : C, C++, VC++6.0, ASSEMBLY, FORTRAN, PASCAL
TOOLS/ Platforms : VxWorks shell, DiskOnChipflash , LEX, YACC, SOFTICE,STAR-TEAM PROFESSIONAL 3.0, DDK/SDK, WBT
Hardware Platform : MPC8260, m68k, x86, Cyrix MediaGx

Work Experience :

Got more than five years of experience in the area of Systems Architecture, Design and Software development, mainly on–

Optical networking/fiber optics based product DWDM, CDWM, SONET OC- 192/48 .
Device Driver VxWorks, WINDOWS NT, WINDOWS CE and proprietary RTOS mainly for telecomm card.
Thin client WBT- Windows Based Terminal based on WIN CE.
Configuration management, performance monitoring, flash handling/management, SNMP, TRAP/ALARM management, user interfaces and applications.

Here are the companies I worked on:

Working from June 2000 to till date in Merrento Networks as a Software engineer in the Engineering group. Merrento Networks is an Optical networking company which provides end to end Metro and Regional solutions by providing DWDM solutions for various access/protocols Ethernet, ESCON, Fiber channel etc.
Worked from August 1999 to May-2000 in Waxonet Communications as a software engineer grade-II/design engineer in the system group. Waxonet is optical networking sub-system company. This company is in development of optical networking ASIC s using their proven CoreCell based ASIC development methodology with focused on Access/Metro and Core market.
Worked from july-1998 to July 1999 in SwitchUp Networks as a software Engineer in the system development group. SwitchUp Networks is a system development Software Company.

Fields of work:

Requirement and system design analysis.
Detail design high level and low level software design .
Implementation/development with close interaction with marketing and system/architectural group.
Detail interface design and implementation with various modules/groups.

Project Profiles:

1. Merrento Networks:
1.1 CWDM MUX/DEMUX.
1.2 Automatic power equalization using OPM Optical Performance Monitoring .
1.3 SONET Performance Monitoring:
a. SONET PM for OC-192
b. SONET PM for OC-48
2. Waxonet Communications:
2.1 Chip Modeling to verify the functionality and constraints.
2.2 Development of NT based driver for the SONET/ATM based chip.
3. SwitchUp Networks:
Windows based Terminal thin client development for remote computing based on WINDOWS CE.

1. Merrento Networks Project profiles:

1.1 CWDM MUX/DEMUX 4-Channel :

This is the current project I am into-the idea is to provide a cheaper transport solution to the edge/access market/customers using CWDM technology. It supports protocol like Fiber Channel, ESCON, Ethernet, SONET/SDH OC-3/12/48 , and Fast Ethernet.

Responsibility: Design and implementation.

Mainly worked on k-56 modem v.90. All the SFP Small Form Factor and GBIC Gigabit Interface Controller using I2C protocol, diagnostic routines, configuration management and flash handling.

Team size: Three
Status: Completed.
Platform: MPC8260, VxWorks 5.4, C, Tornado 2.0, Tornado shell Tools

1.2 Automatic power equalization:

The idea is to automate the power equalization problem during ADD/DROP, MUX/DEMUX and Amplification to eliminate/minimize the manual intervention. This can be achieved by distributed software, which monitors all the related data per channel and attenuates per channel.

My role was focused on Optical Performance Monitoring OPM . It involves:

Accumulation, analysis, processing and storage of all the data and passing this information to the Node controller periodically.
Configuration management, database management, PM processing conformity with GR-253 , flash handling.
SNMP interface, TRAP/ALARM handling.
User interface and applications.

Platform: m68k, Legacy Proprietary RTOS, WMU3000, VOA.
Team size: Three.

Responsibility:

Design and Implementation.
Close interaction with the NMS, Marketing group and system design/architecture group to achieve/maintain the conformity of GR and various requirements.

Status: Completed.

1.3 SONET Performance Monitoring PM :

The goal was to develop transponder based on SONET OC192 and OC48 and also to do performance monitoring i.e. to monitor the health of the NE Network Element and to take appropriate actions and also to maintain static s/history of all the events/parameters, which will act like a STE Section Terminating Equipment in accordance with BELLACORE GR-253 requirement.

Responsibility:

Managing/leading the firmware part of the project.
Close interaction/active participation to maintain the Conformity between MRD Marketing Requirement Doc , System design/architecture including GR-253 , NMS and firmware.
Design and Implementation of the firmware.

The firmware functionality includes:

SNMP interface, configuration management, flash management, driver for the PM chip, database management.
PM management that includes data both analog and digital i.e. from SONET header Accumulation, Analysis/processing, Storage and synchronization between various PM activities.
Synchronization with NMS Network Management System for various activities fault management, data collection etc.
GR-253 implementation for STE PM, TRAP/ALARM processing.
User interface and applications.

Platform : m68k, Legacy Proprietary RTOS, AMCC INDUS chip.
Team size : One firmware part .
Status : Complete.

2. Projects in Waxonet Communications:

2.1 Chip Modeling: Modeling of WindowMaker for OC-48 TM Traffic Manager :

The WindowMaker suppose to make a list of cells/packets to be transmitted to the scheduler which then sends those cells/packets by using TDM Time Division Multiplexing .Our target was to model/simulate it to check it s functionality and also to check the real-time constrain, if any, in terms of time/memory.

My responsibility was to design it model it in terms of c++ classes/functions using SystemC tool.

Actually we replaced all the modules of WindowMaker by a set of con-current processes c++ functions-supported by SystemC , all the processes interact by signals through ports supported by SystemC .

SystemC is a modeling tool provided free by a joint effort by major EDA-companies like-Synopsys, Frontier and Coware.

Platform : NT/VC++ 6.0, SystemC
Language : C++
Team size : Two
Duration : Three months.
Responsibility : Design-part
Status : Completed

2.2 DEVELOPMENT OF NT DRIVER for SAR622:

SAR622 stands for Segmentation Assembly and Reassembly SAR at a speed of 622 mbps. This is a PCI based memory mapped device, which takes ATM cells and assemble them in to packets and reassemble packets in to ATM cells. The idea is to validate the functionality of the SAR622.

My role was focused to develop the driver for SAR622, which basically does two main functions:

Handle the device specific part Interrupt, initialization etc.
To give access to the higher layer software test engine etc. to validate the functionality at a higher layer and make it more general in nature.

As far as device driver is concern this PCI card contains more than one device in the card SAR,TC and PCI to LOCAL BRIDGE , so there are three ISR s Interrupt Service Routine and DPC s Deferred Procedure Call to handle the interrupts for each three devices. This driver handles issues like sharing of ISR s for multiple card and multiple processors using spin lock .

Responsibility : Design, Implementation, Debugging and Testing of the driver.

H/W Platform : X86-based platform
S/W Platform : Windows NT 4.0/DDK
TOOLS : DDK, Softice for debugging , Numega Debugging tools like DriverAgent and DriverWorkbench
Team size : One
Duration : 6 months
Status : Completed and working.

3. DEVELOPMENT OF THE WINDOWS BASED TERMINAL WBT SwitchUp Networks

This is a Windows Based Terminal development thin client project for remote computing. This is a diskless m/c,the m/c boots through flash memory and the loader loads the WinCE image from flash to system memory and then transfers the control to the WinCE O.S.

The localized protocol handles only mouse movement, keyboard, display etc. All other things are done in the server. The client interacts with the server by well-defined protocol like Citrix ICA, Microsoft RDP.

I worked mainly on the following specific projects:

Flash Management, configuration management, and database management.
Drivers based on Windows NT and Windows CE .
Debugging and testing.
User interface and applications.
Porting of existing citrix ICA 3.0 thin client protocol driver 16-bit – only the Display part on Cyrix MediaGx 32- bit client .

Server : Widows NT 4.0 Terminal Server Edition-Beta2
Client : Windows CE 2.10 Diskless with Flash memory and Cyrix MediaGx processor
H/W Platform : Cyrix MediaGx Advance Processor with DiskOnChip flash memory.
Platform / : WBT Windows Based Terminal -Windows CE 2.10 , Citrix
Tools Metaframe Server: Microsoft Terminal Server 4.0- Beta-2 with DOS client, Boot Developer Kit BDK of M-Systems , 32-bit client interface for DOS SDK for ICA DOS32 clients .
Language : C, C++ , VC++.
Duration : One Year
Team size: Two.

Projects during M.Tech. Course:

M.Tech. Project :

Title : Retargeting of GCC from 386 to Pentium

Platform : Unix/C
Target : Retargeting the gcc GNU C AND C++ Compiler from 80386-unix to 80586-linux platforms, so that it would support all the Pentium instructions and features of Pentium such as Super Scaler Architecture.

Description : Super Scale Architecture can be taken care of by analyzing whether the Two instructions are pairable i.e. independent or not. By changing the files related with m/c description and rtl appropriately we can support All the instructions of Pentium. Changes of Target Describing Macros Which describe all the features of target m/c, which does not fit in to the schemes of m/c description file can be done appropriately.

Team Size : One
Duration : 6 month

Extra-Curricular Activities :

Chairman of Jaycess Club Engg. College Branch during 1992-93.
Won Intra-University Chess Competition.

Resume 3

Vladimir Chernov

164 Concord Dr.
Sommerville, MA 01821

OBJECTIVE

An Embedded Software/Firmware Engineer position in an electronic system design company where I can contribute using proven ability to develop SW components for complex electronic systems.

PROFESSIONAL SKILLS

Over seven years in development of application, embedded software and digital electronic circuits
Work experience for companies with 5, 20, 500 and 2000 employees
Developed software using C, C++ programming languages and assemblers.
Designed embedded systems with Microchip PIC micro-controllers PIC 17xxx/16xxx
Developed drivers and application software for SuperTask! RTOS
Developed firmware for DeltaTau PMAC motion controllers
Developed code ladder logic and FBD for Micrologix 1500 PLC s and Guard PLC 1200
Developed Xilinx FPGA XC4000E family and CPLD XC9500 family code for digital image processing and digital I/O applications
Created HW and SW Specifications, guidelines and other technical documentation
Worked with CAD software for schematic capture, HDL Abel , logic and timing modeling
Worked with digital and analog oscilloscopes, logic analyzers, PC based simulating systems for microprocessors, ROM emulators, signal generators, etc.
Worked with area and linear charge coupled devices CCD
Worked with Texas Instruments DSP TMS320C80
Gained academic experience with Java and Forth programming languages

EXPERIENCE

06/2000-current.
TRD Automation, Billerica, MA
Software/Firmware Engineer III.

Enhanced software utilities developed for TRD stockers Microsoft Visual C++ V6.0, MFC .
Developed, enhanced and maintained PMAC application firmware for TRD Turbo Socker robots. TRD Stocker robot family includes 4 and 5 joint transport robots controlled by DeltaTau PMAC motion controllers with MACRO interface.
Developed and maintained code ladder logic for Allen-Bradley Micrologix 1500 PLCs used in a new generation of TRD automatic input/output shuttle robot AIO .
Developed drivers and maintained AIO shuttle robot firmware code Borland C++ 4.5, x86 SuperTask!TM RTOS, PC104 platform . About 400 devices have been deployed.
Developed firmware code for digital I/O subsystem SECS protocol, Microchip PIC assembler, Xilinx XC95144 CPLD Abel .

05/99-06/2000.
Gray Systems Inc.

Contract for the client: TRD Automation, Billerica, MA. Same occupancy as above

10/97 – 03/99:
IBS International Business Solutions, Minsk, Republic of Belarus, IBM Germany, Mainz, Germany
Application Engineer

Provided application support Level 2 for IBM ADSM .
Performed investigation of software incidents in C/C++ code.
Worked in Belarus-Germany team.
ADSM is multi-platform DOS, OS/2, Windows NT, AIX client-server reliable backup-archive application for large data sets.

06/98 – 03/99
HallTech Ltd. contract , Minsk, Republic of Belarus
Embedded system programmer

Developed embedded system for high power electromotor protection. It included Microchip PIC 17C756 micro-controller, RS-232 ESD protected interface and Microchip serial EEPROM for storing user specified constants.
Embedded software performed real-time tracing of 6 analog input channels, time-dependent turn off control.
Firmware code was implemented in Microchip assembler.
About 200 devices have been deployed.

08/97 08/98
Belarussian Polytechnic Academy contract , Minsk, Republic of Belarus
Embedded system programmer/ Electronic Engineer

Developed a data acquisition system for an electrical network model. This model was used in the university teaching labs.
Project highlights: The system was implemented with 2 Microchip PIC16F84 micro-controllers. The software part of the project consisted of an embedded program and a Windows 95 interface program written with Borland C++ 4.5 and OWL. The embedded program was written in SIL, a specialized high-level language for Microchip microprocessors.

01/97 – 03/97
Luksor Company contract , Minsk, Republic of Belarus
Embedded system programmer/ Electronic Engineer

Developed a digital controller for a handheld medical laser. The controller provided timing and switching functions for the semiconductor laser. It included Microchip PIC16C74 micro-controller and serial EEPROM chip. The embedded code was written in Microchip assembler.

09/95 – 09/97:
Joined Stock Company “Seleng”, Minsk, Republic of Belarus
Electronic Engineer

Applied Xilinx programmable logic technology in several projects.
Developed a preliminary image-processing unit for a television coordinator. The project was based on Xilinx FPGA and Texas Instruments DSP TMS320C80 technology. The coordinator was used for tracking moving objects. Completed software modeling and hardware implementation of algorithms for digital image rotation.
Project highlights: 15-MHz digital input stream, arbitrary angle of rotation.
Used tools and devices: Xilinx chips XC4013E, Foundation series AldecCAD v1.2, XACTstep 6.1 software, TMS320C80 evaluation board and TI C compiler.
The rotator module was prototyped on Texas Instruments TMS320C80 evaluation board with the help of a specialized C compiler. Worked with development tools for the TMS320C80 processor.
Developed Sobel image processor unit and a 5×5 symmetrical core image convolver unit for HDTV television coordinator.
Project highlights: the Sobel processor was used to highlight edges on the image, and the convolver was used to remove high frequency noise; Coefficients were dynamically loaded into the convolver; both units accepted HDTV digital data stream 75 MHz x 8 bit .
Used tools and devices: Xilinx chips XC4010E, OrCAD SDT and VST 386+, XACT v. 5.2, Borland C++ v. 4.5.

08/95 09/96
Belarussian Academy of Science contract , Minsk, Republic of Belarus

Electronic Engineer Developed a model of hydro-mechanical transmission for heavy trucks. Used tools and devices: Octagon MicroPC controller, CAM BASIC industrial BASIC .

01/92 – 08/94:
AdvancedSoft Ltd., Minsk, Republic of Belarus.
System technician.
Supported a team of electronic and software engineers. Projects included:

FingerTRDnt scanner: prototyped and debugged ISA interface PCBs with Altera/Intel Classic PLDs, assembled and tested small quantity series of the devices.
Passport/visa optical document reader based on SONY CCD sensor: developed software components in Borland C, assembled and tested small quantity series of the devices.

EDUCATION

MS in CS. Belarussian State University of Informatics and Radioelectronics, Minsk, Republic of Belarus.
1990-1995. Major: Computers, computer complexes, systems and networks.

Harvard Extension School. Communication Protocols and Internet Architectures , sTRDng 2002. Harvard Extension School. Java for distributed computing , fall semester 2001.
DeltaTau. MACRO training. 2001
Rockwell Software. RSLogix 500 training. 2001
Axis New England. DeltaTau PMAC training. 2000

LANGUAGES

Russian, Belarussian, English fluent

Resume 4

Ronald Gashek

1500 Golden Gate Dr.
Sacramento, CA 92029

I am responding to your ad seeking software/firmware/embedded engineers.

I am an expert firmware designer with many years of engineering experience in developing products, hardware, firmware and software. I have designed, developed and managed many projects in the areas of communication, digital television, telephony, instrumentation and consumer electronics. I have an excellent reputation for getting projects developed in time and within the budget.

Let me apply my expertise to your project

I would like to talk to you about your current and future design needs.

Sincerely,
Ronald Gashek

Engineering Expertise

Designed and developed many successful microprocessor – based products, hardware and software
High quality software and firmware design in C, C++, JAVA or assembly, extensive RTOS and kernel experience, BIOS, board bring-up
Experience writing specifications, cost and time estimates, proposals, research studies
Expertise in communication system design, system debugging, data transmission, digital television, instrumentation, test equipment and consumer products
Expert device driver designer, BSP integrator and API developer
Products delivered on time and within budget
Friendly, easy going personality

Product Integration Experience

Experience with many processor architectures – RISC, CISC, DSP
Designed many device drivers for RTOS (PSos, VxWorks, PharLap, LINUX, Win-32, OS9 and many others), DOS, Windows
Worked with Motorola 68 family, 860, Intel 8051, 960, 80xxx, Pentium, Zilog, Hitachi, Atmel, MIPS, PowerPC, PIC, ARM and many others
Experience with device I/O – UARTS, modems, A-D, D-A, Board Support Packages (BSP), BIOS, Ethernet
Experience with a large number of communication protocols and bus architectures, PCI, SCSI, PCMCIA, TCP/IP, SNMP, DHCP, ARP, DOCSIS, Sockets, B-ISDN (ATM), Ethernet, Fibre channel
Have developed systems using latest techniques utilizing compilers, debuggers, simulators, emulators, logic analyzers etc?
Experience in quickly designing and developing products, quickly grasping new concepts

Product Management Experience

Depending on the size of the project, I will develop your system by myself or I can lead an engineering team. I will make sure that your product is delivered on time, and within budget
Many references available

Education

BSEE Systems and Control, University of California, San Diego (UCSD)
MSEE, University of Prague

History of Successful Projects and Accomplishments:

September, 2001 to May, 2002
EnergyShare, San Diego, CA
Director of Engineering

Designed and developed embedded server (TCP/IP) -based prototype – ICMP, HTML, TELNET, hardware and software
Assembled and lead a team of expert engineers turning prototype into a product
Successfully demonstrated the product to customers and investors

March, 2001 to September, 2001
Emetrikus, Santa Clara, Carlsbad, CA
Consulting System Engineer

Designed and developed a consumer communication product, hardware and software. Wrote specifications and requirements, coordinated the development teams. Hired and managed engineering development team.

August, 2000 to March, 2001
Host Networks, San Diego, CA
Senior Consulting Embedded Engineer

Developed device drivers for network-enabled MPEG-II video encoder and decoder, modified Windows drivers, wrote Linux and VxWorks device drivers

Designed PCI DMA drivers
Wrote MPEG-II DVD encoder device driver
Developed buffering for network streaming
Developed driver for MPEG-2 PCI-based decoder board

August, 1999 to August, 2000
SONY, DigiSoft of America, San Diego, CA
Senior Consulting Embedded Engineer

System integration and debugging of a new HDTV MPEG-II based digital television set-top box

Redesigned and implemented an RTOS kernel
Installed, customized and tested a TCP/IP protocol stack and PPP
Developed device drivers
MPEG-II decoding and A-V synchronization development and debugging
DSS, ATSC, HDTV product development

November, 1999 to March, 2000
Cooper Mountain, San Diego, CA
Senior Consulting Embedded Engineer

Designed and developed BIOS calls for Pentium – based plug and play DSL modem board under VxWorks

May, 1998 to August, 1999
WESCO Systems, Santa Cruz, CA
Senior Consulting Embedded Engineer

Debugging and improving cable modem product.

DOCSIS based system developing testing and debugging
Writing device drivers
Using VxWorks RTOS
Debugging following protocols: TCP/IP, DOCSIS, ARP, RARP, DHCP, TFTP, SNMP

September, 1998
XENIK, Inc., San Marcos, CA
Senior Consulting Embedded Engineer

Designed and developed firmware for a PCS paging receiver, was instrumental in the board bring-up, developed BIOS
Debugged hardware, installed a Real Time Operating System, debugged Ethernet connection, wrote peripheral device drivers using C, C++ and assembly
Implemented user interface, ported TCP/IP stack, developed a Telnet interface, an SNMP agent, TFTP flash-based in system re-programmable solution

December, 1997 to September, 1998
ABG Condition Monitoring, Inc., San Diego, CA
Senior Consulting Embedded Engineer

Designed C – based embedded firmware for a sophisticated hand – held instrument
Designed and debugged hardware, developed kernel
Developed and implemented a communication protocol stack
Wrote device drivers for DOS, Windows and Lab-View.

April, 1998 to August, 1998
Abby Design Center, San Diego, CA
Senior Consulting Embedded Engineer

Designed and implemented interrupt driven MPEG-2 A-V synchronization using interrupts on RTOS (PSOS), C++
Debugged hardware, installed RTOS and remote Ethernet-based debugging
Wrote video device drivers for PSOS running on RISC architecture
Successfully lead the debugging of the system

September, 1997 to December, 1997
RTE, Inc., Denver, CO
Consulting Embedded Engineer

Designed and developed a cable modem-based communication interface for an interactive television set-top box.
Designed and debugged hardware, installed operating system, wrote drivers for the peripherals in C and C++

March, 1996 to September, 1996
Softstream, Inc., Santa Cruz, CA
Consulting Senior Embedded Engineer

Designed and implemented MPEG-2 video-audio synchronization into digital set-top box.
Debugged and redesigned hardware, built RTOS into the product, (PSOS and VxWorks device drivers)

November, 1995 to January, 1996
United Instrument, Inc., San Jose, CA
Consulting Senior Embedded Engineer

Designed and implemented Built-in Self-Test (BIST) into the digital television set-top box, installed a multitasking operating system
Installed a VxWorks operating system on a prototype platform (board bring-up)
Tested, improved and redesigned digital hardware.
Wrote and debugged complex code in C++ , developed numerous device drivers running under MMOS RTOS; running on RISC and CISC processors

1990-1995
Held engineering positions in the following companies:

Fujitsu
M.L.Hightower, Inc.
Transworld, Inc.
Datron, Inc.
Deltec,Inc.

Resume 5

Harry Stanson

737 Ocean Drive
San Jose, CA 95133

OBJECTIVE

Seeking a challenging position in professional development with a technology related company and offering continuous growth opportunities.

SUMMARY OF SKILLS

Languages: C++, Visual C++/MFC, C, Verilog, VHDL, Assembler, LabVIEW.
CPUs: PIC-16C/18C, 8051, 80186, 68HC11, Z-80, Verilog, HDLC, StrongArm, IXP1200.
FPGA: Virtex-E XCV50E, Verilog, VHDL, FPGA Foundation ISE v3.1i
Operating Systems: UNIX/Linux, MS Windows/NT, DOS, VxWorks.
Network protocols: SNMP, TCP/IP, Win-Sockets.
ICEs & BSP: ICE-2000/Microchip, EMUL51-68-PC/Nohau, ICE-186/Sophia, IXP1200 BSP.
Tools: HP OpenView, EMANATE Subagent Development Kit, IXP1200 Developers Workbench, Gnu-Make, gdb, Clearcase, Visual SourceSafe, Logic Analyzer, Oscilloscope.

ACCOMPLISHMENTS

Developed and designed SNMP proxy agents and MIB files to monitor the managed objects and response the Cable Network Manager CNM requests in the HFC network. The data from managed objects is measured by transponders and transmitted to CNM using telemetry facilities. The SNMP manager-agent model is a multi-threaded program, which runs in the Microsoft NT with Oracle Database, and uses Microsoft DCOM to make connection and communication with other programs. The software test used OpenView and Web browser.
HFC HeadEnd products software-firmware designed and developed from software specification to product release: Forward Path Transmitter/Receiver, Reverse Path Transmitter/Receiver, Redundant RPR, Power Supply, and EDFA. Coded in C and assemblers PIC16/18 and 68HC11 .
Developed and designed a Fibre Channel 8b/10b en-decoder FPGA for Digital Return Transmitter-Receiver. The RTL coding is Verilog and the FPGA device is Xilinx XCV50.
Developed SNMP Agents on IXP1200 development platform with VxWorks: Designed the collection of statistic of network management for Ethernet interface.
Distortion Auto Test program for HeadEnd products: Performance test for CNR, CSO, CTB, XMOD, and Spurious Noise. Using Matrix s CATV Equipment, Network Analyzer, and Cable TV Spectrum Analyzer.
Laser s embedded system software: Developed and designed the power management heater/compressor real-time control, energy saving sub-routine , laser shutter control, shift register read/write, eeprom repair function, power/current/diode mode control, external/internal RF driver control, laser diode protection method in power mode, ADC/DAC/multiplexer/demultiplexer control, and laser diode ages process.
Laser monitoring program: This program used ActiveX component/control to handle the rs-232 communication problems, to process multiple Views terminal, monitoring, and config with single document, and to store configuration data into database-registry.
Remote control software: Programmed on PSD-311 chip, and control and communication between 8051 microcontroller and laser power supply system through RS-232.
Laser system performance auto test program: Graphic display on the screen with power, current, temperature, min/max, time, and deviation. This program also has the functions such as: sampling rate, delay time, auto timer, data storage, data file restoring, and printing with any scale factor on x/y axis.
Developed and designed ALPS-3000 Automated Laser Pigtailing System for rapid and reliable laser diode pigtailing with any package in a high volume production environment. The system used a PC as the single control point for the laser diode controller, optical power meter, YAG laser welder, joysticks, vision system, and 3-dimensions motor motion controllers.
Designed the Plotting Statistical Analysis Software PSAS program to support laser diode test system for mathematics graphic display on life test curves, PVI curves, and pass/fail status report. PSAS is a MS Windows/MFC program.
Designed and implemented the program of Automatic Components Test System ACTS . ACTS software drives fiber optic switches and associated equipment light sources, power meters, polarization controller, environment ovens to carry out measurements of attenuation and back reflection on optical components as they are stressed in environmental chambers.
Implemented the flash memory AMD Am28F512 program designed. Written in Z80 assembler.
Designed software and firmware for Polarization Controller and test station. Coded in C and Z80 assembler.
Fiirmware designed for fiberoptic Switching System. Written in C and 8051 assembler.
Designed and developed PC X-Server Micro-X to support graphical applications across networks to other computer systems, that support the X Window System in UNIX environment. Written in C, X-Windows and with Win-socket and TCP/IP protocols.
Firmware/software program designed and developed on MNP5/V.32/V.42bis modems. Written in 80186 and 8051 assemblers.

WORK HISTORY

Sr. Software Engineer, SomeCOR.net Corp., Oct. 1998 Nov. 2001
Sr. Software Engineer, Vectra-Physics, Inc., June 1996 Oct. 1998
Software Engineer, TDS Uniphase Corp., May 1994 June 1996
Software Engineer, Starlet Communications Corp., Jan. 1992 April 1994
Firmware Engineer, Micro Integrated Comm. Corp., Feb. 1990 Jan. 1992

EDUCATION

Master Program of Computer Science, San Jose State University, CA. Sept. 1994 May 1995
MSEE, University of Memphis, Tennessee. Sept. 1988 Dec. 1989
BSEE, National Taiwan Ocean University, Sept. 1980 May. 1984

PROFESSIONAL TRAINING

Tornado 2/VxWorks 5.4 Training Workshop, Wind River Systems, CA.
HP OpenView Network Node Manager on Unix, Hewlett-Packard, CA.
Introduction to VHDL with Foundation ISE, Xilinx Inc, CA.
FPGA Design, Xilinx Inc, CA.
Unified Modeling Language
Programming with Microsoft Foundation Class Libraries
Advanced Programming with MFC Library using Visual C++
Microsoft Windows Debug Technique
Object-Oriented Analysis
Object-Oriented Programming Design.
OLE 2.0 Programming Using MFC and Visual C++
Network Management Principles
Managing a UNIX TCP/IP Network
The TCP/IP Protocol Suite Network File System and Network Information Service

CITIZENSHIP U.S. Citizen

Resume 6

Fred D. Ivy

Seeking

A Director of Engineering or Architect position at a small product oriented company responsible for project management, resource management, strategic involvement in the corporate business and product development strategy, and an integral member of the management team.

Introduction

My experience in the engineering field extends 15 years, most of this time at start-up/small companies. It is in this environment where my ability to grasp complex problems quickly and resolve them enables constant forward progress. I know how to set up an effective team, manage to the schedules and ship products. I have been called upon at many different companies to accomplish these tasks and have been successful every time.

In addition, my proven track record of building effective engineering teams using positive people centric mentoring and a hands-on, team oriented management style has ensured success. I am often approached by members of my previous teams who are looking to move forward. In fact, many of my direct reports have worked for me several times.

References from previous managers, colleagues and direct reports are available on request.

Qualifications

Strong people and project management skills.
Able to realistically judge project time and deliver on schedule.
Natural leader able to motivate others effectively.
Knowledge of real time and communications/network implementations.
Well-versed in negotiation techniques
Self motivating/starter requiring little resource overhead.
Adept at project cost analysis and customer relations.
Good organizational skills with emphasis on quality.

Experience

2001 – present
Aishe Consulting Services, Los Colinas, California
Principle

Linux and Embedded design

Created JPEG presentation display system for overhead projectors using PCMCIA.
Added Hard disk and LCD screen to projector project for use as running advertising.
Extensive Linux Kernel work in Multimedia drivers using PowerPC.
Working with small, to be named, start-up to raise first round funding and establish core engineering team.

2001 – present
Digital New Technologies, Sacramento, California
Product Development

Linux and Embedded design consumer MP3 player

Working with the founders to land first round funding.
Wrote/Ported 1394 driver for the Philips PDI1394L40 link chip using the TI Phy, running on an embedded ColdFire.
Ported customer specific asynchronous protocol .
Finished port of PPCBoot allow for loading a kernel from an ATA hard disk.
Creating new business opportunities with new customers.

1999 – 2001
QRise, Inc., Sacramento, California
Director of Engineering

MP3 recorder/player

Worked with customers and venture capitol firms and helped create product definition.
Created project schedules and software road maps.
Brought this product to market in under one year with a team of only two software engineers.
Developed from scratch: OS, IDE driver, ATA/ATAPI Layer, CDR layer, HD layer, FAT12/16 File system, ISO 9660 fileystem, USB Driver on host, USB driver for Macintosh.
Worked closely with the hardware engineers to qualify and enhance custom ASIC.
Wrote specifications for various components, including, OS overview, OS Task Switching, USB low level protocol, ISO 9660 file system and FAT12/16 file system.

1999
QRise, Inc., Cupertino, California
Software Consultant

Designed, implemented and ported a real time operating system for an embedded product using the ARM Thumb processor.
Components include, overall Simulation environment, memory manager, timer manager, context switcher, scheduler, profiler and driver model.

1998 – 1999
Vertec Corporation., Palo Alto, California
Software Manager

Software Products Group
Toast and Jam, CD recording software for the Macintosh.

Expanded the Macintosh software team by hiring full time and consultant engineers.
Dealt directly with customer and licensees to ensure timely delivery of needed features.
Responsible for project management, scheduling, motivating a team of design and QA engineers.
In conjunction with Marketing, helped in design, feature selection and implementation.
Worked with Graphic Artists and marketing on interface design.

1997 – 1998
Pears Computer, Palo Alto, California
Software Manager

Core OS Group
MacOS X

Created a strong highly productive team from within and outside of Apple.
Designed and implemented all hardware support for Macintosh and Intel CPU.
Responsible for project management, scheduling, motivating a team of ten.
Worked with many areas within the company to resolve issues and provide long and short term planning.
Consistently ahead of schedule and over delivered, on hardware and new API designs.
Continued to remain technically active as manager by implementing needed drivers.

1996-1997
Copper Networks, Inc. Mt View, California
Director of Software/Founder

Cobalt Cube

Established the software engineering department by building a strong team of engineers in under three months.
Provided input on business plans, market trend reports and strategies.
Help develop partnerships with Venture capital firms in order to secure funding.
Responsible for hiring, scheduling, development tools and project management.
Implemented cross design environment, including GNU C, binutils and libc on Intel and PowerPC.
Ported LINUX kernel to custom MIPS based hardware and had apache running in less than five months.

1996-1997
Sofisticated Digital Design, Santa Clara, California
Firmware Consultant

Integrated Point of Sale Server

Designed and coded all diagnostics and board bring up code for the second generation RIM, using an MC68360. Tests include RAM, ROM, FLASH, Serial and Ethernet.

1994 – 1996
Pears Computer, Palo Alto, California
Software Manager

New Media Group

Pippin Power Player

Software manager for the development of a PowerPC 603 based low cost, high performance home entertainment Macintosh.
Responsible for a team of nine engineers, including hiring, task scheduling, setting up and managing project source control, coordinating releases to SQA, and interfacing to OEM’s in Japan.
Worked closely with hardware team to debug and qualify custom memory controller and video ASIC’s.
Tasks included writing native drivers for new ASICs, adding new functionality and optimizing existing code to work in a low memory environment.
Accelerated schedule, first hardware to Golden Master release in less than seven months.

PowerPC Upgrade Card

Assisted with hardware design, boot code and debugging for PowerPC 601 processor direct upgrade card.
Added to and enhanced existing boot code in PPC assembly to support new hardware. This included dynamic memory sizing, ADB control, sound, and well as dynamic level 2 cache sizing and detection of an auxiliary processor.

Tenderfoot, Point of Sale Client

Sole engineer for a mini Macintosh based on a Motorola 68331 microcontroller. Due to RAM and ROM restrictions a complete redesign existing ROM code had to be implemented. Written almost exclusively in C this product has a similar API to that of a Macintosh. Modules redesigned include; Debugger, with break, trace and disassembly, Real-time blocking operating kernel, Memory Management, Serial controller routines, LocalTalk implementation, ADB and real-time clock interfaces, Graphic LCD drawing and control routines.
Designed Macintosh based simulator allowing code to be written and debugged on any Macintosh before actually having to program embedded ROMs.
Custom designed and implemented a blocking multitasking kernel with Name binding, and low RAM overhead.
Completely rewrote Localtalk from the LLAP, DDP, NBP, ZIP and AARP in ANSI C and optimized the stack to work with the kernel.
Wrote the driver for Rockwell’s 9624 data pump to handle Bell 212 and V.22 bis communications connections using both synchronous and asynchronous calls.
Implemented an ANSI compatible file system to used with the battery backed RAM.
Using the Think Class Library wrote a graphical network management application which displays the icons of all found devices. Clicking on the icon will display a list of files on the device, and clicking on the file will download it to the application.

1993 – 1994
ACDS, Santa Clara, California
Firmware Consultant

Integrated Point of Sale Server

Designed operating system for a real time multiport communications device using 2 MC68302 processors. The system included a multitasking kernel, dynamic memory management, and serial drivers.
Constructed Macintosh based simulation application by writing compatible drivers. This allowed complete testing on multiple platforms as well as source level debugging in Think C for high level code.
Developed Macintosh application to configure, test and download code image to the device.
Ported previously designed low level debugger to handle trace, breakpoints, disassembly, stack crawl, code downloading and FLASH programming.

1992 – 1994
Amanta Technologies, Santa Clara, California
Software Engineer

AmantaView Network Management

Team member for SNMP IP based network management software (AmantaView).
Responsible for GUI design, implementation, low level communication and quality assurance.
Designed and implemented C++ class libraries to replace and enhance existing structured code.
Worked closely with other engineers in the design process of new mibs.

1992
Global Networks Comm, Mt. View, California
Firmware Engineer

OneWorld Server

Designed and implemented systems software for a stand alone 68302 based communications device. Modules include memory management, object based I/O control, and real time multitasking using Motorola’s EDX Kernel.
Developed and ported various Apple specific protocols including DDP, ADSP, PAP, and ATP for use in multiple port data exchange.
Responsible for hardware design, component selection and pricing and layout placement.

1991 – 1992
Barallon Computer, Inc., Sommerville, California
Firmware Engineer

Localtalk Ethernet Router

Primarily responsible for designing and implementing an automated production test fixture for the new network router products. This included hardware/software and controlling Macintosh application.
Designed burn-in diagnostics capable of locating faults with RAM, ROM, PALS and interrupts. Software was also able to display memory and alter memory as well as download new code and reprogram FLASH device for production code programming.
Was asked to help form a separate test department after completing assignment with such thoroughness.

1990 – 1991
MNCC, Santa Clara, California
Design Engineer

T1 Echo Canceler

Primarily responsible for firmware of a 68302 based controller for a T1 echo canceler.
Designed operating system using Motorola’s EDX kernel for ROM, RAM, NoVRAM, alarms, and five serial communications ports.
Developed protocol for communication and implemented for both 8051 and 68302.

1987-1990
STT, Coppland, New Jersey
Senior Design Engineer

KepTrol and MassTrol

Responsible for programming design through production of industrial instrumentation products, often under rigid deadlines. Designed and enhanced hardware and software for firm’s most profitable lines; two self contained industrial flow computers with analog and digital inputs and outputs.
Developed formal proposal based on specific needs of firm’s outside clients. Estimated time, features and specifications of custom products.
Worked directly with customers from the design phase through final release.
Utilized skills in software engineering to develop a menu driven multitasking operating system with RS232 communications and smart parsing for external control.
Checked and debugged final product. Provided operational information to quality control and production.

1985-1987
Stockton College, Stockton, New York
Research Designer for the Chairman of the Physics Department

Visual Automated Data Gathering Device

Independently designed, constructed and operated an interface that digitized composite video signals from a CCTV camera. The system was capable of calculating the time dependence versus position of several independent objects in real time.
Developed and implemented all controlling software in Z-80 and 6502 Assembly Language and Basic.

Education

Stockton College, Stockton, New York Bachelor of Arts. May 1987
Dual Majors: Physics, Computing; Minor: Mathematics

Cornell University, Stockton, New York
Course work in electrical engineering under the Stockton College/Cornell exchange program

Santa Cruz Extension, Santa Clara, California (1992)
Object Oriented Design.

Apple Developer University, Cupertino, California (1994)
PowerPC Boot Camp.

Motorola Technical Training, San Jose, California (1995)
PowerPC Architecture.

Apple, Cupertino, California (1994-1998)
Various management, scheduling, and employee relations classes.

Personal

Almost every job I’ve had has kept me busy outside of the boundaries of the office. In order to try and keep a balance, I play bass in an R&B/Jazz group as well as arrange and chart music for the other members. I also work out regularly and play racquetball.

Resume 7

Jerom Ewans

PO Box 36747
Indianapolis, FL 32903

Mr. Ewans has two decades of experience on government and commercial contracts as a Computer Engineer. His work has involved both hardware and software design, on levels from systems to components. He has worked on Embedded, Sun and PC platforms in applications and real-time software/firmware design for communications and control systems, microprocessor- and microcontroller-based hardware/software design and digital design. He continues to pursue embedded systems projects which exercise and enhance his knowledge, addressing each client’s problems and goals through creative solutions.

Affiliations:

Cooper Computer Consulting; Computer Engineer; 86 – present
Designed software/firmware for Inmarsat/Intelsat satellite voice/data networks, automated T1/E1/POTS test equipment, GPS locator, SNMP agents/subagents, industrial control systems, remote PC control, BIOS, PC device drivers and debuggers. Co-designed software for GSM-based wireless local loop, Call Management (Q.931), ATM, ISDN gateway, Internet-over-satellite, dynamic satellite network channel management, remote site monitoring/control, ion implantators, interactive kiosks and POS systems. Designed hw/sw for PC input devices and MCU control systems.
Thomson Corporation, Gov’t Information Systems Div; Sr Engineer; 85 – 86
Designed ATE software, communications simulations and computer device drivers. Co-designed DBMS software.
The TSD Corp., Tactical Systems Development; Computer Engineer; 82 – 85
Co-designed RPV, communications and surveillance systems software. Designed computer device drivers.
Cooper Computer Consulting; Computer Engineer; 78 – 82
Designed microprocessor- and microcontroller-based control systems hardware/software.

Education:

B.S., Magna Cum Laude, Computer Engineering, Florida Institute of Technology, Melbourne FL, 1982

Clearances:

Debriefed from all DoD Top Secret and other agency SI accesses.

Skills Summary:

Software Design – Assembly Languages: 80×86, PIC, 8051, 68306, 68HC11, 80196, 68705, ADSP-2100, 680×0, 8080, 8085, 6502, 6800, 6805, 6809, COP8, Z8, Z80, Z180, 9900, 80C166, 1802, 2650 and Macro-11
Software Design – High Level Languages/Libraries: C/C++ (Visual/Borland/VisualAge/Gnu/Keil/ANSI), FORTRAN, BASIC, VB, Pascal, APL, COBOL, MFC, Btrieve, dBase and SIMAN
Software Design – Windows Environments: MS-Windows (3.x/95/NT), OpenWindows, SUNview, Intuition (Amiga)
Software Design – Operating Systems: Solaris, SunOS, MS-DOS, UNIX, XENIX, VxWorks, VRTX, pSOS, COSMOS, AmigaDOS, RT-11, RSX-11M, RSTS/E, CP/M, OS/2 and various proprietary embedded RTOS
Software Design – Systems Programming: Device Drivers, TSRs, Debuggers, Kernels, NetBIOS utilities and PC BIOS
Software Design – Applications Programming: Satellite/Wireless Systems, Call Management (Q.931), Process Control, ATE, SNMP Agents, DACC Switching, Signal Processing, FEC, DAS, Communications, Simulation, DBMS
Software Design – Embedded Processor/Real-Time Systems: PIC, 8051, 68HC11, 68306, 80×86, 68705, 80196, 80C320, 87C750, 680×0, 80C166, COP8, ADSP-2111, TI 32051, 6502, 6800, and Z80/Z180 systems
Hardware Design – Microprocessor-based: 80×86, 8085, 6502, 6800, Z80, 1802 and 2650 family MPUs
Hardware Design – Microcontroller-based: PIC, 8051, 87C750, 68HC11, 68306, 68705, 80196 and Z180 MCUs
Hardware Design – FPGA / CPLD Programmable Device design using VHDL
Hardware Design – Digital: xTTL, xCMOS, FAST, ECL, GaAs
Systems Design – Embedded Processor / Dedicated Microcontroller Systems

Miscellaneous capabilities:

In-House PIC, 8051, Rabbit2000, 87C750, 68306, 68HC11, 68705K1, 80C196, 80C166, Z8, COP8, Systronix Embedded-Java JStamp, and ST/Waferscale PSD Hardware/Software Development Systems
In-House Cygnal C8051F300 Mixed-Signal MCU, TI 320VC5416, ADSP-2111, TI 32051, DSP56002 Dev Systems
In-House NetMedia SitePlayer Microcontroller-based Web-Server Development System
In-House MS-Windows/MS-DOS Software Development on Pentium IV platforms
In-House Digital Design Lab with Test Equipment
System BIOS Modifications for Embedded PCs

Publications:

“6502 Hybrid Opcodes: A Look Inside the 6502 MPU” COMMANDER, Dec82.
“Machine Language Masquerade” MICROCOMPUTING, Sep80.

Partial Client List (Unclassified):

COMSAT Labs, Lockheed Martin, SOTAS, Avenue Technologies, New Directions, PSU-Hershey Medical Center, NCR, AT&T, DEC, Commodore-Amiga, ULVAC North America, Dupont, Diverse Data Products, Insite Peripherals, Eaton Semiconductor, McCrory Stores, Social Security Administration, Government Telecom Inc, Spectrum Interactive, Sears, Renaissance Greetings, Lanier, StarGlide, NIH, White House Communications Agency, NSA, DIA, NRL, USAF, USN

Resume 8

Jozef Trowski

1270 Spring Dr.
Edville, TN 37931

POSITION DESIRED:

Software Engineer.

EDUCATION:

MS in Computer Science, The University of Tennessee, Edville, Tennessee

RELATED EXPERIENCE:

2001-2002
Self-employed, Edville, TN
Software Engineer

Contract Work:

Windows NT applications programming in C++ user interface modification and expansion, error correction, code cleanup .
Working on Z80 and Z180-based embedded firmware adding new functions, correcting errors, code cleanup .

Self-Education:

Learning about programming in JAVA
Learning about VxWorks real-time operating system and its implementations

Other:

Taking care about important family issues.

1994-2001
Saving Energy Corporation, Edville, TN
Software Development Engineer

Responsibilities:

Design and development of the user interface, data collection, processing and presentation programs for Windows 3.11/NT/95 applications.
Design and development of low-level firmware for the V53
based x386 logic embedded application. The multitasking, proprietary firmware code included system startup, coordination between tasks data acquisition, processing and user interface , system reset, interrupt drivers, keyboard, LCD display, tachometer, hooks for interfacing with higher-level C++ parts of the firmware and other routines necessary for hardware control and setup.
Code maintenance and Customer Service Support Provision.

Skills:

Windows 3.11/95/NT system and application programming including serial I/O and multitasking using SDK/API, MFC, Visual Basic, Visual C++, C++ Builder, various third party software packages containing grids, tabs, serial communication routines, etc.
Advanced C++ programming with object oriented analysis and design. All Windows and most of embedded system programming was object oriented. Familiarity with Rational Rose UML.
NEC V53 microprocessor operation and assembler programming.
Ability to read schematics for firmware development.
Using PC-based embedded system debugger from Paradigm with the Grammar Engine, Inc. EPROM emulator for code development.
Using oscilloscopes, logic analyzers, function generators, etc., for software development and testing.
Working knowledge of PVCS, StarTeam, InstallShield and Visio programs.

1994
TelePort International, Inc., Edville, TN
Software Engineer

Responsibilities:

Developing and debugging software for the OMNIview image transformation system

Skills:

Programming in the Intel i960 microprocessor C and assembler languages.
Utilizing the “MT!” multitasking operating system US Software Company for real time video and image-processing purposes.
Identifying and correcting errors in existing firmware.

1989-1994
Computing Systems, Inc., Edville, TN
Software Engineer

Responsibilities:

Design and development of real time proprietary multitasking firmware for predictive maintenance vibration data collectors/analyzers and other embedded applications analyzer-printer adapter, tachometer, “smart” battery charger, etc.
Development of new firmware and making enhancements to existing firmware products.
Firmware maintenance
identifying and correcting errors, updating documentation.
Releasing new versions of firmware to customers.
Providing technical support to employees and customers.

Skills:

HD64180 and M68xx microprocessor family assembler programming.
Ability to read schematics for firmware development.
Data acquisition and digital data processing. Development and maintenance of the analyzer code required some basic knowledge of digital signal processing including Fast Fourier Transform, sampling, averaging, windowing, etc.
Applications of vibration analysis in machinery maintenance.
C and assembler programming for IBM PC compatible computers.

1986-1989
The University of Tennessee, Computing Center Edville, TN
Graduate Assistant

Was a member of the User Services math software support group.

Responsibilities:

User consulting.
Teaching short courses of MACSYMA and MAPLE for students and faculty.

Skills:

Programming languages: FORTRAN, C, PASCAL, and ACSL;
Symbolic manipulation systems: MACSYMA, MAPLE;
User interaction with operating systems: DEC VMS, IBM CMS/MVS.
Operational knowledge of the MOTOROLA 68000 microprocessor and the HP 64000 Logic Development System.
Basic knowledge of parallel programming and program vectorization.

PERSONAL:

A U.S. citizen fluent in three languages: English, Russian, and Polish.

REFERENCES:

Available upon request.

Resume 9

Jay T. Thomas

260 Ferry Street
Rochester, N.J. 07981

OBJECTIVE:

Multi-disciplined designer seeks technically challenging role in hardware/firmware development organization. Position would afford opportunity to draw on 17-years 3 years as employee of/14 years as consultant to of Simpson West Labs/Vincent Technologies development experience.

My forte is embedded control applications specializing in the numerous proliferations of the Intel MCS-51 8051-core Family of microcontrollers .

My traditional role as principal architect for both the digital design and firmware on past projects, has fostered a good appreciation for recognizing/identifying the potential hardware/firmware tradeoffs in an architecture being considered, resulting in a more-coherent design and a shorter product development cycle.

I work equally well independently, or as a member of a team and very much enjoy being exposed to new knowledge opportunities and sharing my experience/knowledge with others.

SKILLS:

PROGRAMMING
Applications programming in C and BASIC, real-time Assembler-level firmware coding for embedded control applications, and the generation of microcode in custom bit-slice architectures.
DIGITAL HARDWARE DESIGN
Digital design with an emphasis on built-in diagnostics, and maintenance considerations unit test, and system integration experience. Specialized in microcontroller-based designs whose applications have included embedded control for automated test equipment ATE , communications controllers, diagnostic equipment, and fault insertion/simulation platforms for automated regression testing.
DATA COMMUNICATIONS
Experience with various synchronous/asynchronous communications interfaces and protocols, and a familiarity with the use of the associated test and design verification equipment protocol analyzers, T1 test sets, etc.
DEVELOPMENT ENVIRONMENTS
Familiar with UNIX and DOS Operating Systems/utilities and experienced with development tools including In-Circuit Emulators, Schematic Capture and Simulation Systems Intel ICE-5100, MetaLink Ice Master, ORCAD, SCHEMA, Altera MAX+PLUS, AT&T Schema .
SUPERVISION AND TRAINING
Supervised Field Service computer repair and calibration group, and prepared and conducted classes at National Technical Support Training facility.
CUSTOMER SUPPORT AND INTERFACE
Experience with on-site remedial and preventative maintenance at customer facilities, and component level troubleshooting on entire systems.

EMPLOYMENT HISTORY:

03/95 – Present
Vincent Technologies formerly Simpson West Labs
Tools Development Lab Development and Resource Management Team

Employed as tools developer/ cell team member with LDRM Group which provided the planning, design, installation and maintenance of the various proliferation s of AMPS/TDMA/CDMA cell site configurations for Whippany-based system test, system integration, soft development, and current engineering organizations .
Defined requirements/specifications, designed digital hardware, wrote firmware and PC-based application program for a Go/No Go vector file -driven automated test facility for the GPITS-III Buffer Board. 150+ much-needed boards were qualified diagnosed/repaired with the design at an effective yield of 99 .
Defined requirements/specifications, designed digital hardware, wrote firmware and worked closely with outside vendor to produce the cost-reduced and feature-enhanced functional alternative to the Keithley Metrobyte System. These efforts alone resulted in a to-date savings of 350K for the company.
Defined requirements/specifications, designed digital hardware, wrote firmware and worked closely with outside vendor to produce the Universal Controller UACB1 Board . Although originally designed for the RF Interface Units RFIU , the UACB1 has proven itself to be a highly versatile design both in terms of performance and reliability , and has been successfully deployed in other platforms LiveLab , Mini LiveLab , and the automated RF Switch Matrix for the IOTA project.
Defined requirements/specifications, designed digital hardware and worked closely with outside vendor to produce electrically controlled A/B Switch to provide automated alarm facility for the Lucent Network Wireless Systems Business Unit s NWSBU TDMA Series-II System Test organization. These efforts resulted in the significant reduction of the regression testing process.
Was recognized point of contact for questions/problems regarding the electrical interfaces for the various development tools, the Attenuation Control System ACS , the automated alarm tool and the remote load/boot facility. Was often consulted on in-field support and field trial issues.

10/90 – 01/95
Simpson West Labs
Hardware/Firmware Design Network Wireless Business Unit

Responsible for the digital design and firmware for the Receiver RX1PACK and Transmitter TX8PACK circuit packs for the CHEZ project.
Responsible for the digital design and firmware for the Optical Control Unit OCU for the Universal Fiber Microcell project.
Defined, coded and tested special firmware load utilizing the serial interface of the BCF1 for the introduction of the LMT product at the Vehicular Technologies Conference VTC Show .
Defined, coded and tested UN365 Alarm board firmware.
Designed ATE Automated Test Equipment hardware and firmware for factory test platform which significantly reduced the time to test production versions of the UN365 Alarm board.
Defined, coded and tested BCF1/BFBX firmware, providing the LMT maintenance features for the Series-II, Universal, ETACS and JTACS variations of the MICROCELL project.
Worked closely with Hardware/Software/Integration and Test developers to facilitate the migration of the LMT product through each phase of the development process provided test scripts and plans to hardware integration and factory test engineers, worked closely with software developers during integration phase, visited factory to observe testing procedures and provide quidance, etc.
Provided technical support, firmware and automated test equipment for the 6 GHz, MICROCELL project.
Defined, coded and tested both a NTT and NEC version of System Controller firmware for the Japanese Common Amplifier Project.
Performed unit testing and developed an automated communications test facility for the System Controller for JCA.
Coded PC-based parallel port-driven interface utility to support the unit testing of programmable synthesizers on the BCR1 board.

07/90 – 10/90
Simpson West Labs
Digital Design/Test Avionics Systems Dept.

System test/troubleshoot/repair of GBI and SGM circuit packs for CSP project.
Design/capture of Side-A of AT&T Advanced GIPPE circuit pack for LHX projects.
Design of SEM-E prototype board for projects pending.

02/90 – 07/90
Simpson West Labs
Test/Support Engineer Lightwave Hardware Development Dept.

Design capture, programming, and distribution of Altera MAX EPLD devices using Altera MAX+PLUS development system.
Wrote C application program which provided a “step and repeat” facility for “Gerber” formatted printed circuit design files.
Coded assembler language maintenance monitor Intel 80C152 Microcontroller which provided a monitoring and control facility for unit testing efforts for the TG3 Timing Generator – Stratum 3 circuit pack.
Coded assembler language maintenance monitor Intel 8752 Microcontroller which provided the mechanism/interface for testing design via a serial protocol.
Unit Testing of TG3 circuit pack.
Support of models program.
General administration of component and equipment repair/rework requisitioning.

07/88 – 01/90
Simpson West Labs
Test/Support Engineer Avionics Design Dept.

Designed test fixture to support interface testing of Group Bus Interface GBI , Static Global Memory SGM , Switch Modules and Switch Controller SEM-E modules with a Tektronix DAS9200.
Designed stand-alone test fixtures which allowed test personnel to observe and troubleshoot, and establish a general sanity of their designs.
Wrote C application and DOS batch programs that automated the process by which output file of simulation tools would be ported, filtered and processed into DAS9200 compatible format for subsequent application to device under test. Coded programs that performed the reverse process, allowing vectors captured from a device under test to be interrogated in a UNIX/Sun Workstation environment.
Performed system administrative functions and provided technical assistance for the DAS9200 system and related test fixtures.
Coded an assembler language maintenance monitor Intel 8752 Microcontroller that was incorporated in product application load” which provided an embedded diagnostic facility on the GBI SEM-E.

06/86 – 07/88
Simpson West Labs
Test/Support Engineer Loop Transmission Dept.

Designed test fixture and supported models program for the ISDN TRU development program.
Developed C coded test/performance assessment monitor that provided control and observability over internal registers and resources of the ISDN TRU design.
Designed a hardware aid and resident software Zilog Z-80 that converted simulation tool-generated output files into bit streams of input vectors, and collected output vectors from a device/model under test.
Designed a PC-based controller board which generated and extracted user defined ISDN data frames from serial bit streams.
Developed hardware/software tools to assess performance of suspect cost-reduced VLSI ASIC new FAD chip . Tools were instrumental in finding/characterizing the nature of the failing devices.

12/84 – 06/86
Simpson West Labs
Test/Support Engineer Loop Transmission Dept.

Designed test fixture and supported models program for the Low Bit Rate Voice TCU program.
Developed a C coded test/performance assessment monitor that provided control and observability over the internal registers and resources of the LBRV TCU.
Integrated systems and coded application programs which provided for the generation of user defined bit streams serving as design/model input, and designed hardware which captured design/model output for user interrogation.
Performed system test and integration of Feature Package D for the SLC-96 Series 5 Digital Loop Carrier System.
FOA First Office Application support for Feature Package D Orlando, Florida .

07/84 – 12/84
Johnson Co., N. J.
Consultant

Design/Layout/Troubleshooting/Integration of microprocessor based industrial process controllers for in-house deployment. Worked with a small but talented engineering group designing monitoring/control units for pharmaceutical applications.

12/80 – 07/84
Electro Safety Inc., Fairfax, N. J.
National Technical Support Specialist

Established, trained and supervised the Computer Repair Department.
Researched, prepared and conducted classes for in-house and field personnel on minicomputer and microprocessor-based data acquisition and collation systems.
Investigated and resolved chronic or persistent system problems and suggested modifications for an enhanced product performance.
Wrote application programs to facilitate customer tracking/billing and work order/material tracking.

06/80 – 12/80
Computer Communications, Inc., Cupertino, California
Senior Customer Service Engineer

Employed as Senior Customer Service Engineer, was provided extensive data communications training on IBM compatible front end processors and remote data concentrators.
Responsible for the on-site maintenance of the communications equipment at an AT&T Complex in Piscataway, NJ.
Company filed Chapter 11 and my employment was terminated.

03/79 – 06/80
RapidSoft Inc., Fairfax, N.J
Senior Hardware Support Engineer

Employed as Senior Hardware Engineer, typical responsibilities included the preventive and unscheduled maintenance on six GE/Honeywell 437 dual processor systems, front end processors, peripherals and related communications gear.
Instructed new employees on hardware maintenance concepts and troubleshooting techniques.

08/78 – 03/79
Technotron Corporation
Senior Hardware Support Engineer

Attended the Data General Training Facility for the Nova III maintenance courses.
Configured, qualified, troubleshot and repaired the automated laboratory systems prior to customer delivery.

09/74 – 09/78
Furroughs Corporation
Senior Hardware Support Engineer

Employed as Senior Field Service Engineer, typical responsibilities included the preventive and remedial servicing at customer facilities on mainframes and associated peripherals, administrating the technical library, maintenance log and parts depot.

EDUCATION:

09/68 – 06/72 Don Bosco Technical H.S. Totowa, N.J.
College Preparatory and Electronic Technology

10/72 – 11/74 Metropolitan Technical Institute Fairfax, N.J.
Electronic Technology and Digital Design

11/74 – Present
Approximately 5000 classroom hours of specialized education at corporate, vendor, and in-house training facilities for hardware/software design/support and maintenance.

REFERENCES:

Furnished upon request.

Clearances: Secret Clearance no longer active .

Resume 10

Thomas Stones

SUMMARY:

DSP PROGRAMMING
SIGNAL PROCESSING
DIGITAL HARDWARE DESIGN ENGINEER

SKILLS:

DSP PROCESSORS / COMPONENTS:
TI: TMS320C20/C25, C50/52/57, F240, LF2407, C548, VC5410, C6201
Motorola: DSP56002, DSP56303, DSP56F805;
ADI: ADSP2101
Digital Filters, Correlators, Viterbi Decoders, MAC s, NCO s, etc.
DIGITAL CIRCUIT COMPONENTS:
Logic families: TTL, LSTTL, FAST, CMOS, HCMOS, ECL, etc.
Memories: RAM s, ROM s, PROM s, EPROM s, FLASH, etc.
Assorted Microprocessors, UART s, PAL s, ALU s, etc.
ANALOG CIRCUIT COMPONENTS:
A/D and D/A Converters, Active and Passive Filters, Analog Switches, Operational Amplifiers, Voltage Regulators, Oscillators, Comparators, Opto Isolators, LED/LCD Displays, Video Cameras, Monitors, Transistors, Rectifiers, SCR s, TRIAC s, Line Drivers/Receivers, Delta Sigma, etc.
SOFTWARE:
MATLAB ver-4/5 , C, DOS, Windows, Word, Excel, Coreldraw, etc.
Assembly Language: Ass t uProcessors, Z-80, TMS320Cxxx / DSP56xxx
DSP tools: Code Composer, Code Composer Studio, CodeWarrior P-CAD 2000 PCB layout , PROTEL Advanced Schematic ver 3.0
Future-Net PC based schematic capture software pkg.
PADS-PCB PC based printed circuit board layout pkg.

EDUCATION:

MSEE 1985 from University of Southern California – USC
Additional engineering courses taken in EEE program at USC
BSEE 1982 from California State University, Northridge – CSUN

Areas of interest: Communications, Digital Signal Processing DSP
Member of Tau Beta Pi, Member of IEEE
Registered Professional Engineer PE – State of California

SUMMARY:

I have had extensive experience as a hardware/software design engineer doing digital logic design and assorted signal processing programming tasks for various companies over the past several years. I have worked both as a permanent employee and, most recently, as a contract engineer both independently and through various contract houses .

My experience includes hardware and software design of dedicated high speed circuitry as well as microprocessor controlled embedded systems. In addition, I have designed both hardware and software to implement digital signal processing DSP functions including digital filtering FIR and IIR , signal modulation, demodulation, detection, analysis, synthesis, convolution, correlation, coding, etc. I am also familiar with low-frequency sub-microwave analog components / circuit design.

In addition to the above design experience, I also have strong problem solving and troubleshooting skills.

Academic coursework has included such topics as Linear System Theory, Digital Signal Processing, Communication Theory, Spectral Estimation, Error Correction Coding, etc. I am familiar with Laplace / Z / Fourier Transforms continuous and discrete time , FFT s, Digital Filtering, Sampling, Decimation, Interpolation, Multirate Signal Processing, etc.

RECENT EMPLOYMENT HISTORY:

2001 – 2002
Randolph Labs
CONTRACT ENGINEER

Continuation of signal processing software design tasks from a prior contract assignment with the same company to add new features to the companies vibration analysis equipment.
Design work included assembly and C-code routines to implement multibank “tracking” filters these are independent, constant-Q, IIR bandpass filters with programmable center frequencies .
Also designed multibank “broadband” filters similar but with wider passbands and programmable high and low band edges .
Wrote code to compute RMS and average absolute value metrics from the above filter outputs.
Implemented a large 2M word data acquisition buffer for signal analysis in the time domain.
Added software functions for doing FFT averaging up to 128 averages for up to 128K FFT s in each of 4 independent channels .
Averaging could be done either non-coherently FFT magnitude only or, coherently in vector form .
Various “channel math” operations could be performed on the final averaged FFT results.

2000 – 2002
Irving Co.
CONTRACT ENGINEER

Initially translated older 80251 assembly code files into newer C-code routines. Then developed both C and assembly code software for use in controlling a new Uninterruptable Power Supply UPS design. The code executed on a Motorola DSP56F805 DSP chip and was developed with the Metrowerks now Motorola CodeWarrior compiler tools.
The design made extensive use of the DSP s internal peripherals PWM s, A/D s, Timers, etc. to save on external hardware.
The design included software which implemented various closed loop control algorithms.

2000 – 2002
R & D, Inc.
CONTRACT ENGINEER

Brief contract assignment to instruct one of the companies programmers on programming procedures for a LF2407 motor control DSP chip using a Spectrum Digital evaluation board.
Developed skeleton code routines to demonstrate how to program the chip s PWM modules, Timers, Interrupt Vectors, burning internal FLASH memory, etc. for use in various designs.
Wrote misc assembly code routines to help speed up the final code.

2000 – 2001
Digital Design
CONTRACT ENGINEER

Extensively debugged and documented legacy software written entirely in ADSP2101 assembly code for use in a digital receiver.
Discovered and corrected several subtle design bugs embedded in the original assembly code to improve receiver performance.
Provided detailed descriptions of the code s signal processing routines all previously undocumented .

2000
Satellite Systems
CONTRACT ENGINEER

Brief contract to evaluate some existing PC based C-code software and then translate it into new C and/or assembly code routines to run on a VC5410 DSP processor.
The application involved image compression/coding routines.
After discovering several errors in the initial software and running some preliminary DSP test code on a VC5410 evaluation board, the company went out of business and the contract was never completed.

1999 – 2000
Atenko, Inc.
CONTRACT ENGINEER

Brief contract to evaluate a Spectrum “Daytona” dual C6201 DSP board for use in a GPS related project.
Due to an internal company reorganization which resulted in their being acquired by another company, the contract was canceled.

1999
Star United Co.
CONTRACT ENGINEER

Translated old signal processing code originally designed to operate on the now obsolete TMS320C14 DSP processor to the newer TMS320F240 for a new line tracer pipe locator product.

1998 – 1999
Advanced Processing Code
CONTRACT ENGINEER

Extensively debugged and cleaned up existing DSP56002 signal processing code to vastly improve the performance of earlier company products for use in vibration analysis and rotor/prop balancing applications.
Then, translated the entire design to run on a newer DSP56303 DSP processor.
Added additional features to greatly enhance performance for an entirely new product line.
Software design included both assembly as well as C code routines to implement large block floating point FFT s and various other signal processing functions such as digital decimation filtering, programmable time windowing, scaling, zooming, etc.

1998
Crayton Systems
CONTRACT ENGINEER

Debugged a prototype TMS320C548 DSP controller board for a 100kW power protection system.
Wrote C548 assembly code test routines.
Designed an RS-232 interface to communicate with the DSP processor.
Helped redesign and layout their next generation signal processor board.

1997
Techical Design
CONTRACT ENGINEER

Designed assembly language DSP code algorithms for the TMS320C50 / C57 processors to implement various signal processing functions such as AGC, DTMF detection, FSK detection, FFT spectral analysis, tone detection, digital FIR/IIR bandpass, lowpass, notch filters, etc.
Brief contract to design TMS320C50 assembly code interface routines to a PIC microcontroller as initial work for a new communications project.
Designed digital hardware to generate test data sequences synchronized to the scan rate of a CCD camera and frame grabber board as a proof of concept for a new optical correlator design.
Designed software to implement a realtime 20-channel multiplexed digital filter processor used to post-filter data from a bank of delta sigma A/D converters in an automotive test bed application. The routines were all written in assembly code for a TMS320C52 DSP processor.

1995 – 1996
Computer Communications
ADJUNCT INSTRUCTOR

Taught various courses and labs in Electronics, DC Circuit Analysis, AC Circuit Analysis and Calculus.

1984 – 1996
TechnoFax, Inc.
EMPLOYEE / CONTRACTOR

Designed digital and analog circuits and directed digital design in Digital Systems Research Lab while working on the following projects:

BIG VITERBI DECODER BVD : Designed digital and analog hardware to implement a programmable constraint length K max K=15 , rate 1/r r=2,3,4,5,6 Viterbi Decoder for the decoding of spacecraft data. Hardware design included both analog and digital gaussian noise sources, simulated data generators, programmable data encoders, SNR and Bit Error Rate BER estimation, Symbol Sync and Node Sync Correlation circuitry, internal self-test circuitry, etc.
SHUTTLE IMAGING RADAR SIR-C : Designed a data demultiplexing system used to descramble information recorded on the Space Shuttle s high density data recorders, a multi-tape buffering unit used to make copies of the master tapes received from the shuttle and a high speed parallel- to-serial converter.
GALILEO S-BAND PROJECT: Worked on contract to develop a multichannel RF 295 MHz test signal generator used to simulate the Spacecraft s transmitted S-band output signal. This was used as a test signal source for the rest of the project whose function was to maximize the return data rate from the spacecraft which was greatly diminished due to an antenna malfunction .
MOBILE SATELLITE EXPERIMENT MSAT-X : Designed an all digital data modulator-demodulator 8-PSK modem using the TMS32020/C25 series of DSP processors. Design included a Z-80 controlled RS-232 interface to an IBM-PC for software development and downloading program code into the TMS32020/C25 processor boards. Designed both analog and digital filters to remove intersymbol interference by pulse shaping using square root, raised cosine pulse shapes the transmitted symbols.
ADVANCED RECEIVER PROJECT: Designed electronics for an all digital receiver including an I/Q quadrature demodulator with decimation filtering and other assorted signal processing circuitry .
SEARCH FOR EXTRATERRESTRIAL INTELLIGENCE SETI : Designed a 16 Megabyte dynamic RAM DRAM memory board for use in a 2-million point complex FFT spectrum analyzer.
SYMBOL STREAM COMBINER SSC : Designed digital hardware to combine together symbol streams from several sources to increase the SNR of the received symbols when arraying several antennas together.

Additional comments:

I am a very “hands-on” engineer and am at home working in a laboratory environment. I am familiar with most types of test equipment o-scopes, logic analyzers, etc. and have enjoyed designing, building, testing and troubleshooting various electronic circuits both for work and as a life long hobby.

Resume 11

Gregory Michelline

127 North Drive
Saratoga, FL 34236

TECHNICAL SUMMARY

Management: Significant experience managing software teams from small software groups to large systems software integration groups of 20+ members.
Cable TV: Possess a working knowledge of Scientific Atlanta digital set top environment, as well as the General Instrument cable set top environment including, GI CFT2200 with appropriate head end equipment.
GPS: Extensive background in differential GPS, including RTCA-DO-217, RTCM-SC-104 versions 1 & 2, Magnavox and Motorola differential data formats. Background also includes knowledge of several DGPS receivers Trimble, Magnavox, Motorola, Ashtech, and Litton , and knowledge of ARINC 743A Airborne GPS Receiver specifications and the FAA Software Certification Standard RTCA-DO-178B.
Communications/Protocols: All IP related protocols TCP, SNMP, UDP, FTP, TFTP, RIP, etc . Solid background in several other protocols V.35, DS1 [T-1], ISDN/BRI, EIA/RS 232/422/449, Ethernet, MAC layer protocols, ARP, X.25, OSPF, ISDN, CLNP, IDRP, Integrated IS-IS HDLC NRM, ARM , LLC-1, LAP-B. Specialty knowledge in ARINC proprietary protocols EACARS, ARINC 429 Avionics protocol standard and ARINC 724B, ACARS, specification.
Software Languages: Strong background in C Uniware, Microtec, Intermetrics, Borland, Microtec, and Microsoft C compilers . Motorola 68020 Assembly language, PL/I, ADA, Pascal, Fortran, and Basic languages.
Operating Systems: Significant experience working with UNIX System V including the use of the UNIX Make utility, SCCS, and C shell. Knowledgeable in DOS on IBM PC compatible machines, as well as pSOS and MTOS on embedded hardware platforms. Set-top OS s like VxWorks and PowerTV.
Hardware: Possess experience working with several cable set top devices/head-end equipment, Motorola 680×0 VME based platforms, SUN SPARC IPX systems, and Applied Micro, and ZAX in-circuit emulators for Motorola 68020 Micro processors. Protocol analyzer experience includes Atlantic Research 4600 and 6600 and PC based protocol simulators LM1, SCC, and Pacific Avionics 429 emulators, as well as, PC and SUN based multiport controllers.

PROFESSIONAL EXPERIENCE

KarenMedia, Inc., Bradton, Florida
2/00 – Present
Director of Broadband Technologies.

Founding member of start-up venture targeting collection of audience viewing information from digital cable TV systems.
Involved in identification and definition of specific product offerings based on technology and target customer market.
Responsibilities included: requirements, design, sub-contractor hiring and contracts, schedule and execution of product.
Other duties include business plan development, resource planning, marketing, customer research and identification, as well as negotiations and contracts with hardware/software suppliers.

Aeronautical Systems, Inc., Hapolis, Maryland
12/98 – 2/00
Staff Principal Engineer – System Engineer for VHF Data Link.

Member of a small systems engineering team designing a state of the art, 100M digital air ground VHF network.
Responsible for determining requirements, protocols, interfaces and system decomposition for a very large air ground network to be deployed over all land covered areas of the globe.
System will allow any aircraft to talk to its airline host or CAA through this digital RF network.
Data will be passed over both IP based protocols and ISO protocols like CLNP.
The system was modeled using OO systems design techniques.

BDS-APEX, Rumbia, Maryland
11/97 – 12/98
Project Manager – Design and development of innovative cable TV applications.

Lead of 5 software and systems engineers that designed return path applications for GI CFT2200s delivered on a RF proprietary cellular return path or over COTS supplied ES&F.
Responsibilities included: system design and requirements, allocation of requirements to the appropriate COTS products and customer supplied HW, and interface definition.
Responsible for setting and managing customer expectations and for bringing to a positive conclusion any customer issues.
Managed project budget, profit margin, project scope, product requirements, and customer invoicing.
The resulting system included a custom designed hardware RF modem and ground up software development of 68340/MX919A code including a custom protocol for delivery of cable return data from a 2000 unit cell.
The GI CFT2200 API application would gather data and return the data over the RF modem or ES&F on a two way cable plant.
At the head end the data was retrieved and sent to a web server over the Internet for inclusion in a proprietary application.
Data could be accessed from the web via HTML from the Oracle data base .

Manager

Responsible for generating proposals, seeking new business opportunities, and providing technical evaluation of potential corporate acquisitions.
Monitor and evaluate performance of 5 senior software engineers.
Make project assignments based on the capabilities of individual engineers.
Responsible for ensuring product quality by following ISO-9001 development and business processes.

Aeronautical Systems, Inc., Hapolis, Maryland
10/87 – 11/97
Manager /Technical Lead of HF Global Data Communication System.

Lead of 20-25 systems, hardware, software, and test engineers. 4 million dollar project with a very aggressive 11 month schedule that allows global data communications for the airline industry. Responsibilities included: technical content, team selection, schedule, and process quality. VME/68040, Cisco, APC, C code, pSOS

Manager of Integrated Arinc Ground Station IAGS Team.

Manager of 8-12 person technical team developing Air to Ground RF Ground Stations. Responsible for technical leadership, performance evaluation and status reporting. Also responsible for employee training and developmental needs.

Technical and Systems Lead for turnkey IAGS.

Lead of 15 -18 software, systems and test engineers. The resulting Aircraft datalink system has been successfully sold internationally. Responsible for all technical aspects of the ground station portion of system, including the software architecture, systems component selection, component integration, project/team management and validation of product quality. C code, pSOS OS

Software Lead for prototype IAGS.

Responsible for delivery of 68040/VME based VHF ground station in very short time frame 2 months . Developed estimate, produced plan, oversaw execution of plan and verified quality of product. C code, pSOS OS

Manager of Air Traffic Software Systems Engineering.

Manager of 8 software engineers developing air/ground voice services and GPS related software.

SW Lead for GPS Related Systems.

Lead of 4 member software team. Primary contact to the Systems Engineering group during the System-Level Requirements and Design phases. Responsible for ensuring continuity throughout GPS related software products. Lead SW engineer on end-to-end differential GPS message delivery and verification to commercial airlines system. Responsible for SUN-based product that broadcasts validated differential messages to aircraft and then validated that the uplinked data was correct. C Code, UNIX System V

SW Lead for GPS Precision Approach Services GPAS .

SUN based prototype differential GPS message delivery system. This product decoded RTCM-SC-104 from a Trimble differential receiver and delivered an ARINC defined DGPS message over ACARS to a Litton airborn DGPS receiver for aiding in an aircraft precision approach. C Code, UNIX System V

GPS Ground Station GGS SW lead.

This PC based differential delivery system delivered an RTCM-SC-104 differential message as an ACARS printer uplink to an aircraft avionics demonstration pallet. The aircraft pallet included a PC based ACARS 429 printer emulation that presented the uplinked message in a readable format. C Code, DOS OS

Project Leader on the ACARS Ground Cluster Controller GCC system release.

Responsible for all phases of the project life cycle including establishment of milestones, coordination of tasks within and between different functional areas, and the organization of the workload for programming team in order to meet deadlines. This release was successfully fielded onto a live network. C Code, MTOS OS

Support engineer for GCC SW development.

Involved in all phases of software development. Design, coding, testing and integration of software for a real-time, multitasking micro processor based communications system that functions as a condenser and message processor for a nationwide air to ground communications system used by commercial airlines ACARS . Source code was in C running on a proprietary real-time operating system. The development environment was UNIX. C Code, MTOS OS

Member of ACARS technical review board.

As a member of technical review board for ACARS was responsible for the evaluation of technical options and making recommendations to senior level management.

Software design and documentation followed ARINC Software Development Standard based upon DoD-STD-2167A.

EDUCATION

B.S. Computer Science Youngstown State University
Minor: Mathematics Youngstown, Ohio 44425
Minor: Electrical Engineering Tech. June 1987

DEMONSTRATIONS

AEEC meeting in Houston, TX, October 1991, Asian Aerospace Show and 4th annual Air Traffic Symposium in Singapore, February 1992. Lead Software engineer and software support for demonstration of DGPS over ACARS with the addition of aircraft avionics emulation.
ORD flight testing trials, Houston, TX, August 1991 – July 1992. Trials of Differential GPS over ACARS data link with testing of Litton avionics aircraft in real world environment.
WCNS symposium in Reston, VA, June 1993, Dallas Fort Worth DFW American Airlines flight testing, Dallas, TX, June 1993 – Present Lead software engineer for incorporation of DGPS message integrity and data link integrity, and support of DGPS flight test with commercial aircraft in real world environment.

Resume 12

Viral Sinderate

902 Ocean Line
Billerica, MA 01826

PROFILE SUMMARY:

Successful, self-motivated engineering professional with extensive experience working within teams, supervising technical personnel, and exceeding technical design and development goals and objectives. Extensive Hands-on experience in the area of Electronics, Computer Engineering and Embedded Systems Hardware and Software for applications in Data-communication and Process Automation industries. Areas of expertise include extensive industry knowledge, practical experience in the developing, maintaining, and improving engineering processes, and excellent interpersonal communication.

WORK-EXPERIENCE:

Analog Systems & Devices, Inc., USA
01/2001 Current
Sr. Hardware Applications Engineer

As a member of team designing the Next-generation chipsets for multi-port Central Office modem, designed and developed 3 different software Development Platforms. They are based on ADSP-2191 and ADSP-21535 Blackfin DSPs in multi-processor architecture. The on-going project is a PowerPC MPC8260 based platform to be used as Management Entity controller for all Evaluation boards and Reference designs.
Worked with Altera s FPGAs ACEX 1K and APEX II , designed board level interfaces: Top-down digital system design, simulation and verification using Quartus II tool Verilog .
Designed Reference/Demo board of Integrated Voice and Data multiport CO modem, using current ADSL chipsets and telephony chipset.
Responsible for designing HW systems, schematic entry ViewDraw , Board design for signal integrity of High Speed Bus, debug and test.

Creeks Automation, Inc., USA
03/2000 01/2001
Embedded Project Engineer

System Design: Worked with the customer to finalize the interfaces, specifications and project schedule of material handling Robot. Configured PC/104 boards to meet system requirements of new product. The axis control is achieved through motors controlled by four DSPs TMS320C40 .
Embedded real time software development: Developed and debugged supervisory software for 80386 system, running under VxWorks RTOS for robot trajectory planning and execution, model torque computation, wafer mapping and motor phase angle estimation.

HTTR International, Inc., USA
04/1999 02/2000
Lead Design Engineer

Lead a team of 4 design engineers. Initiated discussions with the customer to finalize the specifications and schedule of a microcontroller based Versatile Process Unit supporting HART protocol for network and Web-enabled , which mediated different functions required for the HVAC applications. Designed the system hardware and software architecture , schematics and boards. Worked on integration, debugging and demonstration.

KRS-SYS TECHNOLOGIES PVT. LTD, India.
1993 1999
Principal Engineer

I was a senior technical person of this company, which had many standard products and also specialized in custom-designed projects in computerized Process Automation. Holding various positions, I executed over 20 projects.
Project management and Customer liaison: Lead the teams of 4-6 design engineers for custom-built projects.
Designed the systems HW and SW architectures of 14 custom designed projects. Worked on designing of standardized PCBs, debug and testing. Also developed 10 critical firmware modules, in Assembly and C.
List of major projects: Data Acquisition & Analysis System, Group Alarm Display, Computerized Pump Test System, ATE to test Motor Starters and ATE to test Contactors, Smart Transmitter, Data Acquisition & Analysis System for Dehydration Process, ATE for Testing Assembled PCBs: Total 8 Projects , 24 Zone PID Controller with Datalogging and PC interface, Four Zone PID Controller.

Raoday Syscon Pvt. Ltd, Pune, India.
1985 1993
Technical Manager

This is an American Joint Venture Company manufacturing Microprocessor based Automation Products and Accessories. Joined this startup company from its inception with the complete responsibility of running it s entire technical operations. Worked on various Projects and managed groups of Engineers. Covered liaison with US Collaborators on all the technical matters, re-engineering of the products, R & D of new products, Analog/Digital circuits & boards, Assembly/C Programming.

Worked on Motorola 68B09 based instruments for Analysis of molten Cast Iron and precise measurement of Temperature of molten Steel, C.I. Aluminum in furnace/ladles for Steel Plants and Foundries. PID Controllers, Scanners and 68HC05 based special type of Indicators.

Worked out specifications, System Design, Commissioning, Customer support, technical documentation of various turn-key Instrumentation Projects using Sensors/Actuators, Dataloggers, PID Controllers and PCs. System Design of Software packages in C for database generation and Analysis of Process Parameters Trending, Histograms, Alarm Analysis using these instruments in Network.

Indian Space Research Organization s
1972 1985
Design Engineer

Started career with Digital Systems Division of Space Agency and designed Digital data-communication systems for Space Satellites and custom ATEs. Responsible for the design, manufacture, testing and operations of Telemetry and Telecommand Systems PCM Communication and ATEs.
On-board Command Control Unit to switch on/off the Cameras to get maximum data coverage of low orbit Bhaskara I and II Remote Sensing Satellites.

PROFESSIONAL SKILLS:

Hardware Proficiency: Digital, Analog and Mixed Signal systems design, ADC/DACs, Communication and other Peripheral Devices, High Speed bus interface, Schematic Design and Capture, Board Design using latest CAD tools includingLayout/Artwork/Fab/Assembly ,Testing, Debugging and documentation. Experience on Real Time Operating Systems and Software/ Firmware Design.
Microprocessors/Microcontrollers/DSP: 8/16/32 bit processors system design. Hands on experience with Analog Devices DSPs, Intel/ Motorola Microprocessor/ Microcontrollers. Worked with following processors: ADSP-2191, ADSP-2192, ADSP-21535 Blackfin , MPC8260 PowerPC , 16C74, 8085, 8086, x86, Z80, 68B09, 68K, 68HC05, 68HC705KJ1, 68HC08, 68HC11/16, 8051/52, 80C535/537, 89C51, 80C320, 80386 & many others.
FPGA/CPLD: Altera s ACEX 1K and APEX 20K families Interfaces and programming , Lattice PLDs and PALs.
Development Tools: Innoveda s ViewDraw Schematic capture/ analysis Assemblers, C Cross-Compilers, Simulators, In-circuit Emulators, Logic Analyzers, Various PC based designing /debugging tools, Digital/ Storage Oscilloscopes, Spectrum Analyzers and many Test and Measurement Instruments, MS-Access, MS-Project, PVCS
Languages:Assembly, C, C++, Verilog/ VHDL.
Operating Systems/RTOS: MS-DOS, Win 95/98/NT, VxWorks, pSOS, OS-9
System Design: Digital Data Communication, xDSL, PHY interfaces of USB, Ethernet, UART, IEEE-488, RS-232/422, RS-485, MULTIBUS, VMEbus, PCI and similar serial as well parallel ports/ buses for data exchange and their drivers. Process Automation applications include FIELDBUS Systems Industrial Networking
Monitoring and Controlling Field Instruments having connectivity to PCs over standard Networking Protocols and Data Acquisition Systems and SCADA. Knowledgeable on different Industry Standards and QA procedures.
Good Knowledge on: Telecom and Internet Technology, ADSL/xDSL, ATM and IP Networks, IEEE/ITU Standards and OSI Models And many Industry Standards in my area.
Leadership and customer support: Assessment and execution capability to work independently on a project from scratch to finish by using proper techniques and tools. Coordinating with the team members effectively and guiding the junior members, Documentation, Technical writing Data sheets, Application Notes, Manuals, Design Reports etc. , pre-sale and post-sale Customer support/ demos/ training.

EDUCATION:

Four-year Bachelor of Engineering Degree with Honors in Electronics and Telecommunications from University of Pune, India.

PUBLICATIONS/ CONFERENCES:

16 Design Ideas and 10 articles in technical journals. Participated in several technology conferences and shows, representing my company.

OBJECTIVE :

Senior Embedded/Hardware Engineer or Manager Design/Application
Permanent position/ long contract preferred : H1B visa transfer required

REFERENCES: Available on request.

Resume 13

Pradeep Vasai

921 Corner Palm Drive
Deep Valley, CA 93065

SUMMARY OF EXPERTISE

Development of real-time embedded systems utilizing microprocessors and microcontrollers
Implementation of LAN/WAN/VoIP/Fax protocols and DSP algorithms
Firmware design/development for advanced modular telephones
Host/DSP communications interface, device drivers design and implementation
Key contributor in all stages of product development from concept to implementation
C, C++, Assembler and DSP programming
RTOS and Development tools including In-Circuit Emulator & Debugger
Excellent communication, leadership, analytical and problem solving skills

WORK EXPERIENCE

2002 – present
Stepboard Corporation, Bernard, CA
Senior Embedded Software Engineer

Embedded hardware and software solutions for converged network communications
Developed Applications Programming Interface API software for H.323 conferencing applications
Developed, implemented and tested firmware for T1 / E1 programmable Single-Chip Transceiver
Worked with VME and compact PCI bus interfaces

2001 – 2002
Smart Communications, Eastlake Village, CA
Senior Software Engineer

Software development for voice-data integrated access device
Software integration for data and voice applications
Designed, developed and implemented T1 driver software
Developed interfacing applications with Multi-link PPP WAN protocol
Implemented inter-processor communications
Implemented protocol stacks and state machines : H.323, MGCP, CAS

1997 – 2001
Vortel Networks, Canada & U.S.A
Senior Software / DSP / Firmware Engineer

Voice over IP applications software development
Implemented Media gateway and Signaling gateway protocols
Designed and implemented communications between Host processor and DSP
Implemented Transparent Common Channel Signaling protocol
Worked with TCP, UDP, RTP, RTCP applications
Participated and contributed to architectural design discussions

1998 – 2000
Vortel Networks, Belleville, Canada
Software / DSP Design Engineer

Developed call processing and ISDN signaling for Voice networking
Supported DSP features : modem, fax relay, echo canceller
Designed, developed, implemented and tested Signaling DSP driver

1997 – 1998
Vortel Networks, Calgary, Canada
Firmware Design Engineer

Firmware design and implementation for Caller ID, Call Waiting phones
Developed telephony and user interface for Two-line ADSI screen phone
Designed and implemented stutter dial tone detection feature

1996 – 1997
ADE Technology, Vancouver, Canada
Senior Digital Design Engineer

Investigated different protocols for home automation systems
Designed an intelligent residential lighting control system prototype using EIA s CEBus standard

1990 – 1996
Marat Electricals Limited, Bangalore, India
Manager & Senior Engineer

Led and managed software development of automation and telecommunication systems
On work assignment at ABB Power Systems, Sweden for 6 months project on software design and development of digital control systems using a real-time simulator
Modeled, simulated and tested an arc furnace flicker controller
Implemented bit-bus controller using ISDN HDLC protocol

1989 – 1990
University of Calgary, Calgary, Canada
Research Engineer

Developed a real-time digital adaptive controller based on recursive least squares identification and pole shifting control

EDUCATION

Doctorate Ph.D. degree in Electrical Engineering University of Calgary, Calgary, Canada
Masters degree in Electrical Engineering Indian Institute of Technology, New Delhi, India
Bachelors degree in Electrical Engineering University of Mysore, Karnataka, India

Resume 14

Prakash Dutraveen

127 Bennington Ave., #45
Passavay, NJ 07055

OBJECTIVE:

Seeking a lead role in the area of embedded system development.

WORK STATUS:

US I am authorized to work in this country for any employer.

EXPERIENCE

1/2001 – Present
BDS Intricity, Carfield, NJ
Team leader – Engineering

In addition to Software and hardware development current responsibilities include:

Lead a group of Software and Hardware Engineers and other resources including external 3rd party developers, contract manufacturers.
Manage the development and life cycle of all products from prototype to production to delivery including cost/benefit analyses,Design, development, documentation, launch and maintenance of both new and existing products.
Collaborate with Marketing and Sales
Evaluate new technologies and make proactive recommendations to influence the company s strategic product direction.
Setting engineering priorities and schedules.
Recruiting and training a technical team.

EM200 IP METER

Leading the team in design and development of World s first Energy meter that enables user to communicate with the meter using internet protocols and includes built in HTTP, FTP servers and email and DHCP clients. The board is designed around Netsilicon s NET+15 Chip with ARM7 32 bit RISC processor core. The processor communicates with the meter using ANSI C12.18 protocols over serial port and connects to LAN with 10/100T Ethernet.

The hardware development involved designing the board that can withstand temperature range of -40 to +85 C with low power consumption and fits in a space of 2 X 3″. The Ethernet interface is designed to provide 2.4kV isolation, since this is the integral part of the meter.

Software development involved the development of embedded HTTP server, email client, DHCP client and FTP server applications, device drivers for Ethernet, FLASH,EEPROM etc., device initialization and POST routines and Socket communications using extensive multi-threaded programming in C on TreadX OS. Wed server involved the development of dynamic HTML pages with XML data islands, Forms to setup and reconfigure meter, email and FTP.Email application is designed to send periodic and alarm reports to the user. It is also designed to receive emails to modify the setup information or reply the email with meter data.

FTP is provided for the user to retrieve large amount of data such as load profile in a file format.

6/1998 – 1/2001
Alpha Tech Labs, Carfield, NJ
Team Leader – Engineering

SOLID – STATE ENERGY METER

Lead the team in design and development of state-of-the-art revenue grade energy meter for remote utility electricity metering applications. It s a first of it s kind in providing 0.2 Class accuracy and open communication protocols and data tables ANSI C12.18, C12.19 and C12.21 . Meter features optical port and telephone modem as means of communication for data gathering.

Development of this meter eventually led to the acquisition of the company by AES Corporation, the world s largest independent power producer.

The project involved the design and development of hardware using NEC s 32 bit RISC Processor 70F3003A, Atmel s DSP and ADC and designing of various custom components including LCD display, On-board power supply with input range of 60 to 320 Volts, Current transformers with 0.1 accuracy and linearity over the range of 0.1 to 200 Amps. This product is designed to operate over the temperature range of -40 to +85oC and meets all the requirements of ANSI C12.20 standards.

The software development involved the extensive real-time programming in C and assembly for the implementation of proprietary OS involving development of real-time kernel and ISR s and device drivers for reprogramming of in-built FLASH, Optical port, EEPROM with SPI and Telephone modem etc. and API s and application development for the implementation of ANSI C12.19 tables for the data transport, ANSI C12.18 and C12.21 protocol stack and complex algorithms to measure energy quantities in four-quadrant, configurable Time of use tariff structures and calendars and load profile metering. Software development also involved the development meter configuration and programming software Meter Wizard in VB and VC++ to run on PC and communicate with meter using optical port or modem.

8/1996 – 6/1998
Alpha Tech Labs, Carfield, NJ
Team Leader – Engineering

UVACA – INTIGRATED POWER MONITORING SYSTEM

Project involved the development of Multi-Processor high speed and high accuracy power measuring system with on-board Telephone modem for Remote Automatic Meter Reading.

The hardware is designed around two Processors, one for measuring and processing of Active Power, Reactive Power, Frequency, Voltage and Active and Reactive energy information and the second Processor for storing and transmitting data to the Central System.

The software development involved the extensive real-time programming for measurement, error correction, display and communication.

ACYUTA – AUTOMATIC METER READING SYSTEM

Acyuta is a low cost, real time, multi-channel, multi-tasking meter reading system with on-board Telephone modem and Two Way Pager interface. This system facilitates the reading and transmission of load profile data from electric, gas and water meters. It can also be used to perform the remote load management functions.

The project involved the hardware and software development and implementation of the innovative REFLEX, 2 – WAY Pager technology.

DLCP – DIGITAL DATA LOGGER

Project involved the design and development of hardware and software and adoption and the Implementation of Power Line Communication technology to facilitate communication between the Data loggers and the Master.

DLCP is designed to count pulses from various electric, water and gas meters, transmit this Information to Master for storing and processing the data.

Hardware was design around DS2550 microprocessor and Intellon s Powerline Interface module.

Software involved implementation of EIA / IS-60 Standard protocols for CE – Bus power line communication. Real time Kernel development for the implementation of physical and application layers of data acquisition and communication.

ANALOG DATA ACQUISITION SYSTEM – ADLC

This project involved the design and development of hardware and software for 16 – channel Analog and 8 – channel digital data acquisition system with on-board Telephone modem to communicate with the central data processing system.

Hardware development involved design and development around Dallas Semiconductor s DS2250 Processor, Analog data acquisition with high speed 16 bit A/D converter.

Software involved development of code for Processor management, data acquisition, data logging and communication with Telephone modem.

7/1990 – 8/1996
Arloskar Electric Co, Ltd. Mysore, India
Senior Engineer

ADVANCED MULT-CHANNEL CNC SYSTEM – VIKING 200

This project involved hardware and software development for an advanced multi-channel, Multi-axis COMPUTER NUMERIC CONTROLLER CNC system, built-in PROGRAMMABLE LOGIC CONTROLLER PLC and colour CRT display for MAN-MACHINE INTERFACE, graphics for dynamic axis display and user program simulation. System consists of two CPU cards, designed around Motorola s MC68020 Microprocessor, communicating over a high speed serial link. The Master CPU board is responsible for MMI, PLC and Slave CPU Board for controlling axes movement. Support logic and colour palette is designed using the XILINX EPLD. Color Graphic Card is designed around Hitachi s 65484 Graphic Processor. Firmware development involved routines for CANNED CYCLES, MMI, real time process display,graphics simulation and PLC input/output control routines.

DEVELOPMENT OF SINGLE AXIS MOTION CONTROLLER

This project involved hardware design & development of a stand alone single axis motion controller with built in PLC for transfer line applications like textile printing, paper cutting and special purpose machines for the rubber tire industry.

DEVELOPMENT OF MULTI AXES DIGITAL READOUT DRO

Project involved design & development of hardware around the 8085 Processor and firmware development for axis position display resolution 1 micron . The feedback device is a linear optical encoder.

DEVELOPMENT OF VIKING 150 CNC CONTROLLER

This project involved two phases of development. In the first phase a CPU card was designed around the 68000 Microprocessor to control the complete operations of a CNC controller including axes movement, PLC and MMI. In the second phase of development a remote intelligent keyboard interface was developed around the 8051 Microcontroller, which communicated with the main system over a RS232 link.

DEVELOPMENT OF A SPECIAL DRO

Project involved the hardware design & development of a special DRO for GROSSENBACHER of SWITZERLAND. As a part of the development program, training on maintenance and troubleshooting was imparted to engineers at M/S GROSSENBACHER.

MODIFICATION OF A COLLABORATED PRODUCT

Project involved technology absorbtion from ADOLPH NUMERIC CONTROLS U.K., hardware modification and manufacture of 5 axes CNC controller for the Indian market. The hardware modification included the redesign of the 68000 CPU, digital I/O, Analog output and feedback interface cards.

DEVELOPMENT OF SINGLE AXIS DIGITAL READOUT FOR MACHINE TOOL APPLICATIONS

Project involved hardware and firmware design & development. The hardware was developed around the 8085 Processor. The resolution of the measuring instrument was 1 micron. The feedback device is a linear incremental encoder.

DEVELOPMENT OF A LOW COST CNC CONTROLLER

Project involved hardware design & development of a low cost CNC controller with LED display. The hardware is designed around 8085 Microprocessor.

9/1986 – 7/1996
Hypertronics Pvt., Ltd Hyderabad, India
Design Engineer

DEVELOPMENT OF TRAIN SPEED RECORDER AND MONITORING SYSTEM FOR INDIAN RAILWAYS

Project involved hardware, firmware and software design & development of a recorder module to record the speed of trains. The hardware was designed around the 8085 Microprocessor. The feedback element is a proximity sensor. Extensive software was written for monitoring system to monitor and analyze recorded data at a loco shed.

DEVELOPMENT OF TRAIN AXLE COUNTER AND WARNING SYSTEM FOR INDIAN RAILWAYS

Project involved hardware and firmware design & development for an 8051 Microcontroller based axle counter for monitoring the train movement.

DEVELOPMENT OF AUTOMATIC BATTERY CHARGERS FOR INDIAN RAILWAYS

Project involved hardware design & development of Automatic Thyristorised Battery Chargers of various ratings from 24 Volts/10 Amps to 110 Volts/25 Amps.

EDUCATION

7/1986 OSMANIA UNIVERSITY India-AP-HYDERABAD
Bachelor s Degree
BS ELECTRONICS AND COMMUNICTION ENGINEERING

SKILLS:

Project Management: Lead a team in design, development of products from concept to production. Activities include Customer Interface, Requirements Analysis and Specification, Software Design,Hardware Design, Packaging including Plastic Mold Design, Coding, Resource Estimation, Risk Management,Preparation of project proposals and Business plans, Delivery Schedules, Project Tracking and Subcontract Management.

Lead a team in design and development of modular embedded software algorithms and verification.
Design, development and implementation of real time embedded software for Industrial Controllers,Energy Meters and Internet Connected Devices.
DSP/Microprocessor/ Micro-controller firmware/software development using Assembly and C language for 32/16/8 bit controllers. Digital and Analog hardware and device drivers.
Implementation of Structured Design Analysis and Methodologies.
Hardware Tools: JTAG, OCDemonWiggler, 68000,8085In-circuit emulators, NEC 850 Development tools Logic Analyzer and Oscilloscopes.
Processors: ARM7, NET+15, NEC s 70F3003, 68020, 68000, 8051, 8085
RTOS: NET+OS, ThreadX, VxWorks, DOS
Software tools: Green Hill s Multi-2000, NEC s SM850, ID850, Development Tools and 68K C Cross compiler & assembler from IMS, USA. 8051 assembler & C compiler from AVOCET, USA
Languages: C, C++, VC++ , VB, HTML, XML.
Design Tools: ORCAD. SolidWorks, XILINX EPLD, FPGA design tools and ABEL HDL
Communication Protocols: TCP/IP, POP3, SMTP, FTP, HTTP, PPP, ARP, ANSI C12.18/21, CE-BUS and REFLEX

Resume 15

Michael Schliman

Campbell, CA 95008

Summary:

2 years project management experience.
14 years consulting experience.
28 years professional programming experience.
Excellent design skills.
Excellent analytical skills.
Team builder.

Skills:

Tools
I have a complete lab setup including digital and analog Tek scopes 2465BCT, 2440 , HP logic analyzer 1660CS , Data Transit bus analyzer, PC s, microscopes, soldering stations, etc. In the past, have used Kontron ICE, Signum ICE, Tektronics ICE, HP 64000 ICE, Logic Analyzers, Spectrum Analyzers, Scopes, and other specialized equipment for disk drive development.
Firmware
Video, Machine Control, Disk Controllers, DOS, Disk Bios, Stepper Controllers, IDE AT-Bus , ESDI, SCSI, ST506 Interfaces
Systems
IBM PC s, RSX11M, RT11, Unix 4.2BSD, VM/CMS, HP MPE1, DOSIIB , AOS, MS-DOS, Corvus LAN, NCSS, GE & TYMSHARE Timesharing Systems
Languages
C, C++, Pascal, Algol, Fortran, Basic, Assembly, Awk, SNOBOL
CPUs and Microcontrollers
8048, 8051, 80C537, 6502, 6800, 6809, Z80, 80×86, PDP-11, HP2100, National HPC, Motorola Coldfire, studied ARM for possible inclusion in product.
Specialized Experience
Considered ATA/ATAPI expert. High speed microcontroller system design.
Patents
5,694,600 Methods and apparatus for booting a computer having a removable media disk drive.

Work experience:

12/01-6/01
Quartum Corporation 7 mos
Consultant

Firmware engineer working as part of a team on a new microdrive product, using the new ST ASIC and microcontroller. Part of the job encompassed porting existing experimental code provided by vendor into production environment. My specialties lie in the interface, which I took over on this code base, along with system issues .

2/00-6/00
Astra, San Jose, CA 5 mos
Consultant

Firmware engineer working on a video disk array product, implementing the realtime system components. Product and company eventually failed due to lack of company marketing expertise

4/95-2/00
Omega, San Jose, CA
Staff Firmware Engineer

Rewrote Zip s core operating system to allow the development of the Zip IDE drive. As a part of this design, IDE removable media support did not exist, so I joined the ATA standards committee, and worked with Microsoft to design and implement it, and place it in the ATA specification. ATA committee participation continued for about two years. Co-designed and implemented a complex state machine that would allow existing BIOS s and OS s to acknowledge and accept the Zip IDE drive as the A: drive U.S. Patent 5, 694, 600 . Implemented JAZ IDE interface. Implemented Clik IDE/ATAPI interface. Co-implemented and designed never-released Pacifica 5G drive s overall structure, and IDE code team of 7 . Worked with VLSI vendors to specify two drive controller/buffer manager chips. Three more patents regarding cartridge designs are in process. Facilitated Iomega s shift from ATA to ATAPI evangelization . Worked with BIOS vendors to get Zip drive support. Worked with software tool vendors to develop support for our hardware platform. Disclaimer: No, I m not responsible for the Click of Death in the Zip drive I found it a year before it became a public issue, and attempted to correct it. I was not allowed to because it was in the disk code, developed in another location, and I was told I was not responsible for that. I notified the CEO about this problem, and was still stymied in my efforts to correct it.

4/87-4/95
Orion Technology, San Jose, CA 5 yrs
Independent Consultant

Firmware engineer residing at Areal from the start to the end of Areal s 5 year existence; produced firmware for entire platform of 2-1/2 laptop IDE products, in all areas of drive engineering except actuator servo. This experience encompassed three completely new designs, using 3 different processors and architectures. A quote in a letter from one of our customers, IBM, to our VP of engineering, Just how are you doing this development with such a small team? Your drives are the most bug-free drives we have ever tested.

Among the firmware areas designed and implemented but not limited to are:

Interface code: logical format, command handling.
Power management.
Code library development.
Disk read/write/format.
Variable length, Multi segment write-back cache.
Serial port Debugger support.
Motor servo.
Self test support.
Drive boot support from disk surface.
Defect management.

ElectroStamp, Mountain View, CA 3 mos
Re-implemented sections of existing firmware in 8048 for extreme high- speed cassette duplication system.

Flextonstar Inc., Santa Clara, CA 1 yrs
Programming for new EISA bus tester device. Programmed and simulated ECC/CRC algorithms. Implemented custom hard disk data converter using custom controller; 8086. Did development work on new hardware for hard disk tester; Z80.

Hiwest Corp, Cupertino, CA on and off for 5 yrs
Located problems in ST506 interface/ controller/ firmware Winchester drive for MS-DOS machine. Enhanced existing software on multiple SCSI Winchester drive firmware/ controllers using Adaptec chipset, added diagnostic interface capabilities and format code. Wrote programs to control test robots.

Edward s Missiles and Space, Mountain View, CA 3 mos
Enhanced underlying Daemon for simulation of PSOS running under Unix. Partially automated testing of large software project.

4/84-12/86
Travertino Inc, San Jose, CA
Software Engineer

Developed software and hardware for two mechanical floppy disk drive loaders. Developed protocol layer, drivers, and test software for IBM/XT controlled Corvus LAN for data storage and retrieval to integrate remote LSI-11 nodes which controlled floppy disk duplication systems. Used Microsoft C and Assembly language drivers and a non-preemptive multitasking executive running under IBM DOS. Implemented menu driven floppy disk bit copier. Implemented Irwin Mass Storage Tape Formatter. Assisted in the implementation of software for a floppy disk parametric data collection system. Designed and implemented copy protection schemes.

3/81-4/84
Glendale Inc, Santa Clara, CA
Test Software Engineer

Responsible for the design and development of test systems for Consumer Electronics Division products covering Atari s 2600, 5200, and new 7800 products. Helped design test flows, implemented test philosophies, and contributed to the establishment of a combined test organization for the consumer and home computer division. Set up the development lab. Developed 6809 based system to test 5200 systems. Developed diagnostics and self-tests for the 2600 system — resulted in a savings of about 20M over 2 years, plus dramatically increased testing throughput. Provided input and programming which ultimately influenced the actual hardware design and chip design to make automatic testing more complete and easier for 7800.

7/80-3/81
Lomark Corp, San Jose, CA
Independent Consultant

Developed line printer drivers and DMA drivers for semiconductor test systems which were Z80 and LSI-11/RT11 based systems.

11/79-6/80
Commtel, San Jose, CA
Firmware Engineer

Developed and enhanced system software for PET product line. Reprogrammed the then current 2023 PET printer. Programmed the never released 8031 PET printer; did some hardware.

8/79-10/79
Private Contract
Independent Consultant

Designed hardware and programmed Z80-based coin-op video arcade game similar to the then popular Bally s Space Invaders for foreign market.

1/78-7/79
International Digital Systems, Santa Ana, CA
Systems Programmer – Analyst

Wrote device drivers for PDP 11 s under RSX11M and RT11 to drive image processing computer. Responsible for system generations, remote site software installation and maintenance traveled extensively . Converted code from Fortran to assembly to increase efficiency of image processing software. Solved system problems on RSX11M. Other systems experience included HP3000 under MPE1, DG Eclipse under AOS, HP1000 under DOS.

8/77-1/78
Epson Data Corp, Mountain View, CA
Programmer

Wrote diskette driver and paper tape reader, paper-tape punch emulators. Used SPC16/895, PDP11/05 and 8080 based development system.

Education

9/73-5/77 University of Santa Clara, Santa Clara, CA — BSEE/CS, 1977

References

I have a long history of proven performance, and can provide many references upon request.

Resume 16

Donald E. Gletcher

4713 Marble Cruz Dr.
Rockland, Texas 75043

SUMMARY

Software engineer with extensive experience in application development, proficient in C/C++, device drivers, and communication and telecommunication systems. Experienced in all phases of software development, with an emphasis on design, implementation, and integration.

TECHNICAL SKILLS

LANGUAGES: C/C++, Pascal, and assembly languages
OPERATING SYSTEMS: Windows NT, Unix, pSOS, VxWorks, and DOS
TOOLS:Gnu development tool set, Visual C++, Tcl/Tk, emulators, and Microsoft Office
PROCESSORS and SYSTEMS: PowerPC, Intel processors, TI TMS320Cxx DSPs, and HP9000

PROFESSIONAL EXPERIENCE

Remodeling Soft, Inc., Euless, Texas
2002
Software Consultant

Developed software for Automated Test Equipment to validate stores control for the F-16.

Environment:

Languages: C++
Operating System: Windows NT
Development Tools: Visual C++
Processor: PC

Tasks:

Wrote test procedures that validate the electrical operation of the aircraft’s stores control, and coded similar test procedures written by others.

Avisto, Irving, Texas
2000 to 2002
Software Engineer

Developed software for a new optical interface card for Marconi’s fiber-to-the-home product. The software environment migrated to Unix, using ClearCase for configuration management, from its original environment of the Wind River sniff IDE on Windows NT workstations.

Environment:

Languages: C/C++
Operating System: pSOS
Development Tools: Diab compiler suite, Wind River sniff IDE, ClearCase, and visionICE emulator
Processor: PowerPC (Motorola MPC850)

Tasks:

Modified the pSOS board support package to execute on the new custom card.
Designed and implemented a flash memory drivers, manager, and application-level access class to support storing multiple software and FPGA loads. Also updated the serial download capability to match the new flash allocation map and speed up integration downloads.
Wrote a Media Independent Interface (MII) driver and application-level access class to control an ethernet PHY to permit autonegotiation.
Designed and implemented drivers and application-level access classes to control two FPGAs, including interrupt service routines for their alarm conditions. Also wrote test software for use by hardware engineers to evaluate FPGA operation.

Raylon Systems Company, Glenville, Texas
1999 to 2000
Software Engineer

Added more discrete output capability to an airborne reconnaissance system by writing software to interface with a commercially available discrete server.

Environment:

Language: C
Operating System: VxWorks
Development Tools: Gnu compiler suite and debugger, and Tcl/Tk
Processor: DEC Alpha

Tasks:

Added discrete control client software, using TCP and UDP over a LAN connection, to control discrete outputs.
Developed a discrete server simulator to test the client software.

Lowell International, Arlington, Texas
1985 to 1990
Software Engineer

Developed software for the Air Force 1 airborne analog audio and data communication switch. This switch uses multiple Intel processors connected by a 1553 bus to provide separate, clear and secure, audio and data switching capability and to direct control of communication assets, such as telephones, central office lines, radios, modems, and cryptographic devices. Designed the switching control and device interface functions, and implemented them in Pascal. In a system upgrade, converted the code to C, and implemented improvements in C++.

Environment:

Languages: C/C++, Pascal, and Intel assembly language
Operating Systems: DOS and proprietary
Development Tools: Microsoft Visual C++, Turbo Pascal, and Intel ICE
Processors: Intel 186 and 486, and STD-bus PC cards

Tasks:

Designed and implemented software to control the switching of communication assets by validating operator-selected connectivity requests and converting these requests into commands to the switch and communication assets. Used a commercial database to define and describe valid connections, and then to generate source code tables to define these connections for switching control.
Designed and implemented software to control the communication hardware.
Integrated the switch software with custom hardware, and integrated the components into a unified switch.
Created a tool for searching system activity logs for data relevant to customer-reported problems to expedite identification and resolution of the problems.
Directed other software engineers assigned to the project.

Allston Network Systems, Arlington, Texas
1990 to 1994
Software Engineer

Developed software for a service data point (SDP), a database server for large amounts of subscriber data. The SDP uses multiple networked Unix workstations. Used formal object-oriented design techniques to design the C++ code.

Environment:

Languages: C++
Operating Systems: Unix
Development Tools: Gnu development suite
Processors: Sun Sparc and HP9000

Tasks:

Developed the SDP service data function that handles requests from a service control point (SCP).
Developed the SDP’s interface to a service management system.

Lowell International, Arlington, Texas
1994 to 1999
Software Engineer

Developed software for a digital, audio and data communication switch for the German navy. This switch uses multiple nodes connected by E1 links. Each node contains a Windows NT workstation and TI DSPs in a VME box.

Environment:

Languages: C++ and TI C30 assembly language
Operating Systems: Windows NT and proprietary
Development Tools: Microsoft Visual C++ and TI DSP tool set
Processors: Intel 486 PC and TI TMS320Cxx DSP

Tasks:

Developed a system prototype as a research project using only a TI C30 DSP, designing and implementing the executive and the device drivers for T1 links and A/D-D/A converters.
Performed systems engineering functions to incorporate the switch into a communication system.
Designed the switching control software as multiple Windows NT execution threads, and implemented it in C++.
Integrated the software and hardware of the switching system.
Directed other software engineers assigned to the project.

Other Experience

Environment:

Languages: Fortran, Jovial, and HP1000 and PDP11 assembly languages
Processors: HP1000, Intel 8086, PDP11

Tasks:

Enhanced a proprietary Pascal compiler, focusing on its Intel x86 code generator.
Developed airborne and ground station software for airborne reconnaissance systems.

EDUCATION

BS, Southwest Texas State University, San Marcos, Texas, major – mathematics, minor – English

This resume may not be submitted by any recruiter without my written permission.

Resume 17

Pradeep Wesai

647 Sunrise Rd, #12
San Jose, CA 95121

Objective:

To seek a position as a Senior Software Engineer in a growing Communications Company. Areas of Interest are in Platform, Device Drivers, BSP and SONET, Gigabit Ethernet, T1,E1,DS3 and RTOSes.

Work Experience:

SmartBridge Technologies, Santa Ana, CA
July 1999 to June 2002
Member Of Technical Staff

Gigabit Ethernet Module: Worked on Architecture, design and development of Gigabit Ethernet Card for the SmartBridge Media Gateway. Feature lead on this project, and was leading a team of 5 engineers from start to finish. Responsibilities include Project management, Architecting, designing and development of all aspects of the Module. Worked with HW team to develop the specification for the card, and sub-contracted the card to outside vendor Ramix. Selected Processor IBM 750Cxe , Intel Gigabit Ethernet MAC chip Intel 82543 , ATM SAR IDT77252 and Galileo Dual PCI Controller 64260A . Worked on design for copy less transfer of Gigabit Ethernet frames to ATM cells and vice versa. The BSP for the card was specified and integrated based on the components of the card. Coordinated test plans, and requirements for manufacturing testing to allow mass production of this module. Also planned for the card to provide Gigabit Ethernet Redundancy. Used Adtech GE tester to verify operation of the GE driver and tweak it. The module is currently shipping.

Coding work on this project involved modifying the Gigabit Ethernet driver, ATM driver, and BSP and designing task dependencies between the various tasks to obtain Gigabit Line Rate capability. Used Vxworks, PowerPC processor assembly and C for code development. Designed the inter-card communication mechanism to communicate messages between the Gigabit Ethernet card and rest of SmartBridge System.

STS-1 Module: Worked on architecture, design and development of STS-1 card for the SmartBridge Gateway. Worked with SONET/VT1.5 framers PMCS8315 , T1/E1 framers, LIUs, CT812 H.110 controller, and Motorola 860 processor. The card was deigned to recover TDM timeslots from the STS-1 frame and connect them to H.110 TDM back plane. The card had flash to save code, NVRAM data, and diagnostic information for debugging purposes. Responsibilities include project evaluation, task scheduling, resource management, designing, and architecting the requirements for the module. Designed the STS-1 card to provide 1:1 Redundancy to connect to Lucent 5ESS switch. Led a group of 4 people to integrate BSP and implement additional features of the application which was developed using Vxworks RTOS and 860 BSP with SDRAM and AMD 8MB Flash. Worked independtly to bring up HW, using VxWorks, PowrPC BSP, SONET and VT level Alarm reporting, SONET Redundancy using APS, and recovering the T1 s off the VT1.5 payload to get Signalling information.

Worked on TFTP downloading of code from 10/100 Mbps, and ATM back plane using IPC messages over ATM 25PHY. Involved creating TFTP transfer client, creating Ram drive and using flash utilities to program code into Flash.
Worked on T1/E1 card, used T1/E1 test equipment, created a T1 poll task to retrieve Signaling ABCD bits from the bt8370 T1 framer, and construct messages to send this information to Call Control SW. Worked on code to provide Hot swap capability, and detection of card when plugged in SmartBridge chassis. Also programmed on card CT812 timeslot controller for H.110 to connect the timeslots from the T1 to the H.110 back plane.
Provided engineering/development expertise to assist in solving customer bug problems.

PowerPC Platform BSP Design and Development: Worked on platform level work to design and implement BSP for various PowerPCs based boards on the SmartBridge Gateway 603,860SAR ,860P, 750Cxe . Very experienced in using Vison ICE for PowerPC, board bring up, in VxWorks boot process both compresed and uncompressed images . and Flash utilites and other HW related Sw support. Use Logic analyzers, Oscilloscopes, and Tornado to debug SW on these boards. Used VxWorks profiler to do system level code optimization to get more CPU cycles. Worked on BSP for Admin, Voice, Switch, STS-1 and Gigabit Ethernet modules on the TB300 Gateway.

Advanced Communications, Saratoga, CA
September 1998 to July 1999
Senior Software Engineer

Feature Captain for Non-Service Affecting Upgrade Project: Prepared requirements documents, scheduling, project planning and implementation of a Non-Service Affecting CPU Dual Memory card. Implemented Low-level device driver for the MPC860. Used PowerPC assembly language, real-time operating systems Nucleus. Experience with 860 processor, EST Vision ICE, BDM debuggers, C, structured design methodology. Tested DLC with GR303, TR-08, and Analog circuits. Experience in real-time systems internals, developed code to implement Performance characteristics of tasks.

Worked on the Timing subsystem of UMC1000. Involved understanding and coding of ASIC and its registers to set up the ASIC to drive signals onto the product back plane. Involved testing using oscilloscopes, frequency counters and other diagnostics tools.

Telecommunications Modern Techniques Corp., Midtown, MD
April 1994 to September 1998
Software Engineer

SW Lead for TDMA/PRI/DS1/DS3 project: Performed duties such as task allocation, scheduling, risk management, mentoring of Junior Engineers. Liasoned with marketing to finalize requirements, negotiate project schedules, implement software design, and provide leadership and direction to SW Engineers and QA staff.

Team Member on TTC 2000 product line: Part of a brand new product engineering team that conceived, designed and implemented a innovative new Test Equipment with DS1, Signaling, DS3 and ISDN features. Used pSOS, SingleStep BDM debuggers, C++, Visual C++ to develop a dual processor test set with Windows GUI interface connected to Real-time test module. Used C++ and its design methodologies throught to implement design and code developement for the product.

Areas of Expertise:

Real-time Embedded design, Real-time Embedded programming, BSP, VxWorks, pSos, Nuclues RTOSes, T1, DS3, STS-1, Gigabit Ethernet, ISDN, GR303, TR08, T1 signalling, Clearcase, PVCS, OOD & OOP, C++, C, PowerPC Assembly, Visual C++, Windows Programming, DIAB Compilers and 860/360 Processor Programming.

Educational Qualifications:

MS in Computer Science, Dec 1993
Stevens Institute of Technology , NJ GPA 3.75

BS in Computer Engineering , August 1992
University of Pune, India Ranked 3rd in University

US Job Status: Permanent Resident of the US

Resume 18

Bill Murray

712 Ruberb Lane
Manchester, Virginia 22602

Summary

Software, firmware and database engineer and system, database and network administrator with over fifteen years of experience in time-sharing systems, embedded systems, real-time and communications. Adept at satisfying end customers as well as internal product management while working alone or as a leader or member of a team. Experience in full-product development over the full life cycle of products. Particular skills in optimization, knowledge retention and distribution, and leadership.

Skills

Customer Support Skills include:

Requirements Analysis: Adept at working with project stakeholders to fully understand requirements and scope of work prior to beginning any development project.
Able to “hit the ground running”: Reputation for coming into a problem situation and quickly grasping the complexities of the issues and providing a sound technical and business solution.

Technical Skills Include:

Development and host platforms used include: Sun/Solaris; DEC Alpha/Digital Tru64 Unix/OSF1; HP/HPUX; PC/Windows 3.x/95/98/ME/NT/2000 , OS/2, CP/M, Concurrent DOS, BSD, Linux; VAX/VMS; PDP-11/RSX.
Embedded platforms include: Tornado/VxWorks, pSOS, VRTX, VxWorks, MTOS, M/PM, proprietary OS, DSP Analog Devices and Western Electric , Motorola 683xx, 680×0,PPC , Intel Pentium, 80×86/7, 8031/51, 8080/5 , Zilog Z80 .
Specialized tools include: version and source control systems CearCase/ClearQuest, make, SCCS, RCS, PVCS, MMS/CMS , HP OpenView, Rapid Control user interface tool, Epilogue/WindRiver Envoy/Emissary SNMP tools, emulators, debuggers, logic analyzers, and protocol analyzers.
Languages include: C/C++, JAVA, SQL Pro-C, Pro-Fortran , Pascal, FORTRAN, BASIC, Assembly Intel, Motorola, DSP, RISC, VAX, Zilog , Unix scripting tools sed, awk, perl, sh, ksh, csh, bash
Communications protocols include: IP TCP, UDP, ICMP, SNMP , LAPB X.25, X.28, X.29, X.3 , Frame Relay, Ethernet, V.120, Bonding, Novell IPX, NetBeui, bus VME, RACEway, proprietary , numerous other synchronous, asynchronous and bus protocols.

Employment

ORNOFOR INC., DUNNHILL, VIRGINIA
2002
SENIOR SOFTWARE ENGINEER

Senior development engineer and network administrator. Project engineer designing and developing software in C for a switched as opposed to routed IP. Project lead on a port to Intel IXP1200 of this software in C and microcode. Project lead on a remote access to Linux routers running this switched IP for demonstration purposes. Used Java, C and shell scripts to allow TKL/SNMP based demonstration program to run on a laptop running Linux to reach out through a firewall and back in through another firewall at Signafor s offices providing realtime access to statistical information about the interfaces on the routers.

CHRIS BROADBAND SYSTEMS, WESTFORD, VIRGINIA
2001
CONTRACT ENGINEER

Project leader, and principle developer for an SNMP proxy agent for hub radios for wireless broadband networking. This proxy agent was built using Tornado/VxWorks as the base O/S, Rapid Control for the user interfaces and Envoy for the SNMP agent. This system provided an FTP server and HTTP server as well as the SNMP agent. Primarily developed in C and HTML with JavaScript. Used HP OpenView particularly NNM and Unix scripts in ksh and Perl running on Sun Sparc Solaris platforms for configuration and testing of the embedded proxy agent. Installed Linux on a laptop PC and wrote scripts to program PCMCIA/Compact Flash modules for booting of the proxy agent. Used Rational ClearCase and ClearQuest management tools running on Unix and Windows 2000. Used Microsoft Office 2000 tools for documentation. Took requirements from product management through analysis through the whole product life cycle for subsequent releases. The team for the spike radio proxy agent consisted of my self and a mid-level engineer who handled more of the Java-Script and html coding under my direction. My team finished releases on or ahead of time with minimal expenditures; this allowed more time for the . Designed look and feel for web page user interface that was so well received it was incorporated into other Java based NMS products for Spike. Led the NMS team on configuration management and defect tracking. Participated in QA at all levels for this product allowing the QA department more time to focus on other products that need more attention than the relatively defect free radio proxy agent. Spike s customers and ultimately Spike management was very pleased with the level of support and noted lack of defects in my product.

MIRAFEL, PHOENIX, ARIZONA
2000
CONTRACT ENGINEER

Ported I2O Intelligent Input/Output kernel extensions and drivers from SCO UnixWare to SCO OpenServer. Worked in Unix C and shell scripts. Performed administration, including OS installation, of several variants of these SCO UNIX operating systems and Linux. Telecommute position. Provided detailed documentation using Microsoft Office 2000 tools.

PULSTONE, NELSON, VIRGINIA
2000
CONTRACT ENGINEER

Designed and implemented a discrete Fourier Transform algorithm for spectral analysis of a telecom analog signal to determine settings for internal amplifiers and filters. Improved the filtering of echo by dramatically optimizing the code so as to afford the time to triple the length of filtering. Used an Analog Devices DSP chip coded in assembly. Used PVCS as configuration management tool running on Novell NetWare and Windows 2000. Authored detailed documentation for customer in the Microsoft Office on Windows 2000/NT.

ADVANCED RESEARCH, FAIRFALL, VIRGINIA
1999-2000
CONTRACT ENGINEER

Designed and implemented an API to allow VxWorks tasks to access memory across a RACEway interface. Selected PMC modules capable of providing RACEway to the VME SBC. Designed and implemented software driver for the PXB chip on the PMC option card. Developed on Sparc Solaris using Tornado system. Work in C/C++. Performed some Unix system administration including installation of packages. Development environment was Sun Solaris. Wrote programs and scripts to assist development.

KRAIC, PETERSBURG, WEST VIRGINIA
1998-1999
CONTRACT ENGINEER

Performed system and network administration of a TCP/IP, X.25, and Frame Relay network for the Veterans Administration. I and two other engineers came into a failing contract and turned it around to the complete satisfaction of the end client. My role was primarily the Unix administration and C programming with other work in FORTRAN. Did program enhancement and maintenance using Oracle s Pro-C and Pro-FORTRAN extensions to both DEC C and FORTRAN and Sun C and FORTRAN. Single handedly took over all work on billing system. Took requirements from product management and accounting departments within SAIC to develop new versions of system for billing of VA and paying of network service sub-contractor – Sprint. Optimized code and SQL access to Oracle to reduce ungainly program runtimes in days down to mere minutes for billing programs. Took customer requests through all stages up to deployment on the production systems. Performed systems administration duties for Sun Solaris, Alpha Tru64 Unix and VAX/VMS systems. As project lead, supervised other engineers in the successful port in one weekend of the whole system including scripts, Cron utilities and batch files and dozens of programs from VAX/VMS to Alpha/Tru64 Unix. All of the difficult sections were reserved for me based on my skill level. Performed other coding in C/C++, FORTRAN and scripting languages on all platforms. Project ended when Sprint was awarded the subsequent follow contract without SAIC s participation.

ARTIZAN CORPORATION, HURON, VIRGINIA
1998
CONTRACT ENGINEER

Used a C/BSD Unix development system to write device drivers for a net attached NFS storage system. The platform was a PC running a proprietary system and RAID drives and numerous network interfaces. In particular developed a beta version of a driver for the 3Com PCI gigabit Ethernet card. Administered the BSD system and wrote scripts as necessary.

DDB SPACENET, BRADFORD, VIRGINIA
1997-1998
CONTRACT ENGINEER

Designed and implemented a link layer protocol for a satellite communications network. Protocol required the ability to guarantee delivery with retries as needed. My protocol used less than one fifth the overhead bits of an earlier generation allowing substantial throughput increase across the slow and expensive satellite links. Development was done on a combination of Windows NT and Sun Solaris systems. Wrote test programs and scripts as needed. Provided detailed documentation to the satisfaction of the customer using Microsoft Office products on Windows NT.

DATACOM CORPORATION, GREENSBORO, VIRGINIA
1997
CONTRACT ENGINEER

Based on successful prior experience at Genicom, I was asked to return to update the RS-232 serial and Centronics parallel port device drivers for a newer generation of Intel 80186 processor. Developed on VAX/VMS systems

CIRT, OSLO, VIRGINIA
1996-1997
CONTRACT ENGINEER

Embedded DSP and CISC programming for AT & T/Lucent Technologies DACS II and DACS II ISX cross connect switches. Technical lead, designer and implementer of WE 1611 DSP code to handle sub-rate multiplexing and multi-point junctions. My architecture and design for an object-oriented architecture allowed the DSP card to far exceed expectations. A previous version handled 55 channels with no error correction or junctions while the version my team created handled 64 channels with error correction and the multipoint junctions. Also worked on the CISC master MC68000 family processor for the TG-193 DSP card. The success of this project led directly to another project awarded to GRC by Lucent. In this project I served as technical and project lead on a major release of code for the DACS II that added Hybrid DS3 capabilities where T1 and E1 channels could be constituent parts of the data stream. Coding, design, management, code control and system administration duties. My team accomplished in 9 months the equivalent of what it took Lucent s staff two years to complete. Work in C/C++ and assembly. Development platform was Windows NT for DSP work and Sun Solaris for Motorola 68k family work. Helped administer the Solaris systems at GRCI, then helped train the hired Unix and Windows administrators.

INNOVATIVE DECISIONS, INC., TYSONVILLE, VIRGINIA
1995-1996
CONTRACT ENGINEER

Worked on the analysis phase of a military communications project. Systems analysis and high-level design of an EEPROM based mass storage device. Analysis and design work on inter-module communications protocols. Installed, configured and administered a Sparc Solaris and SunOS network. Installed applications on the Solaris systems and wrote shell scripts as needed. Work in ADA, C and C++.

TRESTON DATA NETWORKS, WESTON, VIRGINIA
1994-1995
CONTRACT ENGINEER

Integrated the Spectra Debugger package on proprietary hardware using existing operating systems off the shelf and proprietary . Wrote the software drivers for Motorola 68360 SIM and shared memory protocols. Also embedded the X-RAY debugger into the same product. Coding in C/C++ and assembly using Solaris development platform. Wrote Unix programs and scripts as needed.

VESTART HIGHWAY ADMINISTRATION, GANGLEY, VIRGINIA
1994
CONTRACT ENGINEER

Integrated and updated software for a highway sign reflectance application. The platform was a PC mounted in a van with a strobe, reflectometer and range finder in a through the roof periscope. Although I was hired only as a one day engineer expected to fix a simple “assembly language defect” I assessed the actual state of the project.

ATASCO DESIGNS, IDERICK, MARYLAND
1993-1994
CONTRACT ENGINEER

Helped integrate the standard Bonding protocol into an existing inverse multiplexer. Interfaced an embedded 80186and an Analog Devices DSP. I took product requirements from Pataspco and led a team of two engineers in bringing this project to completion to the complete satisfaction of the client. Used C and Assembly using a Windows development platform.

UNITED SCIENCES CORPORATION, CHANTILLY, VIRGINIA
1993-1994
CONTRACT ENGINEER

Designed, coded and tested the initial power up firmware and error recovery software for a flight computer based on multiple MC 68302 microprocessors. Interfaced with the hardware designer on hardware design issues. Embedded X-Ray monitor and debugger into the flight computer. Recoded CRC-16 into assembly algorithm with new execution times half that of the C version. Used Windows development platform.

WYNATECH COMMUNICATIONS, REDWOOD, VIRGINIA
1991-1993
SOFTWARE ENGINEER

Embedded processing in telecommunications. PAD, FRAD and switches, Implemented an SNMP agent and the telnet protocol for switch administration and configuration. Designed and implemented the Frame Relay link management protocols for LMI and ANSI Annex D protocols. Designed and implemented software to route between multiple circuit and packet protocols. Established version control and module management systems using PVCS tools with a network oriented approach for software engineers. Used C/C++ and assembly. Administered Windows 3.1, OS/2, Novell Netware, MS LAN and Sparc Solaris networks. Wrote Unix programs and scripts as needed for development and test.

TEXAS INSTRUMENTS, BERT VALLEY, MARYLAND
1991
CONTRACT ENGINEER

Debugged and enhanced real-time process control and data collection systems using networks of embedded systems and DEC VAX and PDP mini-computers. Worked on operating system kernel, floating point translation between VAX and 80387, and numerical processing issues. Used C, Assembly and FORTRAN.

TELECOMMUNICATIONS CORPORATION, BELLETOWN, MARYLAND
1990-1991
SENIOR SOFTWARE ENGINEER

Designed and wrote embedded software for telecommunications test equipment. Designed and implemented software for T1 and E1 clock jitter analysis. Coded link layer of numerous communications protocols. Set up a configuration management system under HP/UX and SunOs. For a workstation based environment. Led and taught an in-house seminar in C++. Administered HP UX and Sun Solaris networks. Wrote substantial Unix scripts to hide intricacies of SCCS and RCS from other developers.

MIDWEST INDUSTRIES, ARLINGTON, MARYLAND
1989-1990
PRINCIPAL SOFTWARE ENGINEER

Wrote PC based software for numerical spectral analysis and drivers for a spectrum analyzer. Work included graphics, database and statistical analysis. Did customer support and applications engineering. Interfaced between an Israeli engineering team and American customers. Administered MS DOS, Windows and Concurrent DOS computers.

EASYCOM CORPORATION, BILLBORO, VIRGINIA
1986-1989
SOFTWARE SPECIALIST

Wrote embedded firmware for printers. Wrote an enhanced memory management system for an embedded OS. Designed and coded ANSI, IBM, IPDS and HP PCL printer emulation protocols. Worked on laser, shuttle and dot matrix printers. Implemented configuration and build control systems. Used embedded Wizard C, which later became Borland Turbo C. Cross development on VAX VMS systems.

Education

BACHELOR OF SCIENCE IN COMPUTER SCIENCE 1979-1986
James Madison University Harrisonburg, Virginia

Participated in the honors program after being named to the Dean s List. Member of Phi Mu Alpha Sinfonia.

GRADUATE STUDIES IN COMPUTER SCIENCE 1987-1988
James Madison University Harrisonburg, Virginia